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FP2-X-25000X-O-C-D-3-X-EB-X

Description
LVCMOS Output Clock Oscillator, 25MHz Nom, FLAT PACK, 20 PIN
CategoryPassive components    oscillator   
File Size770KB,8 Pages
ManufacturerWi2Wi
Download Datasheet Parametric View All

FP2-X-25000X-O-C-D-3-X-EB-X Overview

LVCMOS Output Clock Oscillator, 25MHz Nom, FLAT PACK, 20 PIN

FP2-X-25000X-O-C-D-3-X-EB-X Parametric

Parameter NameAttribute value
Objectid1496903170
package instructionFLAT PACK, 20 PIN
Reach Compliance Codecompliant
YTEOL5.95
Frequency Adjustment - MechanicalNO
frequency stability50%
Manufacturer's serial numberFP
Installation featuresSURFACE MOUNT
Nominal operating frequency25 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVCMOS
Output load15 pF
physical size16.51mm x 16.51mm x 4.5mm
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Space Level Clock Oscillator
Flat Pack
PDI
FP-Series XO,
utilizing premium swept quartz crystal resonator in a 4-point
mount, is designed for low-to-mid orbit applications and manufactured in PDI’s
own MIL-PRF-38534 and MIL-PRF-55310/QPL certified manufacturing facility.
(Higher Orbits available upon request)
ex)
FP2—T—25000X—M—C—D—3—G—EM—X
*
PACKAGE
ENABLE
TYPE
T
= Tri-State
FP1
= 24 Pin
X
= No Connect
FP2
= 20 Pin
FP4
= 14 Pin
FP6
= 16 Pin
FREQUENCY
00750X-99999X
=
750.000kHz –
99.000MHz
C10000-C80000
=
100.000MHz –
800.000MHz
OUTPUT
C
= CMOS
M
= LVDS
O
= LVCMOS
P
= LVPECL
FREQUENCY
STABILITY
B
= +/-25.0 (Temp B)
U
= +/-35.0 (Temp B+D)
C
= +/-50.0 (Temp B+D)
V
= +/-65.0 (Temp E)
S
= Special
OPERATING
TEMPERATURE
B
= -20 to +70°C
D
= -40 to +85°C
E
= -55 to +125°C
S
= Special
SUPPLY
VOLTAGE
2
= +2.5V
3
= +3.3V
LEAD FORM
G
= Gull Wing
X
= None
S
= Special
GRADE
EB
=
Eng. Bread Bd.
EM
=
Eng. Model
FM
=
Flight Model
Absolute Maximum Ratings
*(X) for standard or assigned for custimization.
PAR AM E T ER
Frequency Range
Output Ranges
Supply Voltage
Input Voltage
Output Voltage
Storage Temperature
Ambient Operating Temperature
Junction Temperature
ESD Protection Human Body Model
Radiation, Total Ionized Dose
Single Event Latch Up Immunity
General Electrical Specifications
SYM
CMOS & LVCMOS
LVDS & LVPECL
Vdd
VI
VO
TS
TA
TJ
TID
SEL
MIN
.750
.750
24
-0.5
-0.5
-65
-40
MAX
800
160
800
4.6
Vdd+0.5 V
Vdd+0.5 V
150
85
125
2
100
60
UNIT
MHz
MHz
V
C
C
C
kV
Krad
MeV-cm
2
/mg
PAR AM E T ER
SYM
CO N D ITIO N S
Fo<24MHz (LVCMOS)
24MHz<Fout<180MHz
(LVPECL/LVDS/LVCMOS)
180MHz<Fout<800MHz
(LVPECL/LVDS)
MI N
T YP
MA X
15
65/45/30
100/80
U N IT
mA
Supply Current under load
Idd
Operating Voltage
Output Clock Duty Cycle
Vdd
@ 50% Vdd (LVCMOS)
@ 1.25V (LVDS)
@ Vdd – 1.3V (LVPECL)
REV:
NA
SIZE:
A
2.97
45
CAGE:
A
3.3
50
3.63
55
V
%
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