OT407
Four-quadrant triac, enhanced noise immunity
Rev. 01 — 19 May 2008
Product data sheet
1. Product profile
1.1 General description
Passivated sensitive gate triac in a SOT54A (wide pitch) plastic package
1.2 Features
I
Sensitive gate
I
Direct interfacing to logic level ICs
I
Enhanced immunity to voltage
transients and noise
I
Gate triggering in four quadrants
I
Direct interfacing to low power gate drive
circuits
I
High blocking voltage to 800 V
1.3 Applications
I
Home appliances
I
Low power AC fan speed controllers
I
Low power motor control
I
Low power loads in industrial process
control
1.4 Quick reference data
I
V
DRM
≤
800 V
I
I
TSM
≤
12.5 A (t = 20 ms)
I
I
T(RMS)
≤
1 A
I
I
GT
≤
5 mA
I
I
GT
≤
7 mA (T2− G+)
2. Pinning information
Table 1.
Pin
1
2
3
Pinning
Description
main terminal 2 (T2)
gate (G)
main terminal 1 (T1)
T2
sym051
Simplified outline
Graphic symbol
T1
G
3
2
1
SOT54A
NXP Semiconductors
OT407
Four-quadrant triac, enhanced noise immunity
3. Ordering information
Table 2.
Ordering information
Package
Name
OT407
-
Description
plastic single-ended leaded (through hole) package; 3 leads (wide pitch)
Version
SOT54A
Type number
4. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DRM
V
RRM
I
T(RMS)
I
TSM
Parameter
repetitive peak off-state voltage
repetitive peak reverse voltage
RMS on-state current
non-repetitive peak on-state current
full sine wave; T
lead
≤
38
°C;
see
Figure 4
and
5
full sine wave; T
j
= 25
°C
prior to
surge; see
Figure 2
and
3
t = 20 ms
t = 16.7 ms
I
2
t
dI
T
/dt
I
2
t for fusing
rate of rise of on-state current
t
p
= 10 ms
I
TM
= 1 A; I
G
= 20 mA;
dI
G
/dt = 0.2 A/µs
T2+ G+
T2+ G−
T2− G−
T2− G+
I
GM
P
GM
P
G(AV)
T
stg
T
j
peak gate current
peak gate power
average gate power
storage temperature
junction temperature
over any 20 ms period
-
-
-
-
-
-
-
−40
-
50
50
50
10
1
2
0.1
+150
125
A/µs
A/µs
A/µs
A/µs
A
W
W
°C
°C
-
-
-
12.5
13.8
1.28
A
A
A
2
s
Conditions
Min
-
-
-
Max
800
800
1
Unit
V
V
A
OT407_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 19 May 2008
2 of 12
NXP Semiconductors
OT407
Four-quadrant triac, enhanced noise immunity
2.0
P
tot
(W)
1.6
003aac259
conduction
angle
(degrees)
30
60
90
120
180
form
factor
a
4
2.8
2.2
1.9
1.57
α
= 180°
α
120°
90°
60°
1.2
0.8
30°
0.4
0.0
0
0.2
0.4
0.6
0.8
1
I
T(RMS)
(A)
1.2
α
= conduction angle
Fig 1.
Total power dissipation as a function of RMS on-state current; maximum values
003aac260
16
I
TSM
(A)
12
8
I
T
I
TSM
t
1/f
T
j(init)
= 25
°C
max
4
0
1
10
10
2
number of cycles
10
3
f = 50 Hz
Fig 2.
Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum
values
OT407_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 19 May 2008
3 of 12
NXP Semiconductors
OT407
Four-quadrant triac, enhanced noise immunity
10
3
I
TSM
(A)
I
T
003aac262
I
TSM
t
t
p
T
j(init)
= 25
°C
max
10
2
(1)
(2)
10
1
10
-5
10
-4
10
-3
10
-2
t
p
(s)
10
-1
t
p
≤
20 ms
(1) dI
T
/dt limit
(2) T2− G+ quadrant limit
Fig 3.
Non-repetitive peak on-state current as a function of pulse width; maximum values
003aac263
003aac264
16
I
T(RMS)
(A)
12
1.2
I
T(RMS)
(A)
0.8
8
0.4
4
0
10
-2
10
-1
1
10
surge duration (s)
0
-50
0
50
100
150
T
lead
(°C)
f = 50 Hz
T
lead
= 38
°C
Fig 4.
RMS on-state current as a function of surge
duration; maximum values
Fig 5.
RMS on-state current as a function of solder
point temperature; maximum values
OT407_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 19 May 2008
4 of 12
NXP Semiconductors
OT407
Four-quadrant triac, enhanced noise immunity
5. Thermal characteristics
Table 4.
Symbol
R
th(j-lead)
R
th(j-a)
Thermal characteristics
Parameter
Conditions
Min
-
-
Typ
-
150
Max
60
-
Unit
K/W
K/W
thermal resistance from junction to full cycle; see
Figure 6
lead
thermal resistance from junction to full cycle; printed-circuit
ambient
board mounted; lead
length = 4 mm
10
2
Z
th(j-lead)
(K/W)
10
003aac206
1
P
10
−1
t
p
t
10
−2
10
−5
10
−4
10
−3
10
−2
10
−1
1
t
p
(s)
10
Fig 6.
Transient thermal impedance from junction to lead as a function of pulse width
OT407_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 19 May 2008
5 of 12
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