SI3232-G-GQR datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Wireless rf/communication> Telecom circuit> SI3232-G-GQR

SI3232-G-GQR: Descriptiontelecom line management ics dual-CH slic only internal 65 vrms; CategoryWireless rf/communication Telecom circuit; File Size1020KB，128 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric Compare View All

SI3232-G-GQR Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	SI3232-G-GQR	-	-	View	Buy Now

SI3232-G-GQR Overview

telecom line management ics dual-CH slic only internal 65 vrms

SI3232-G-GQR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Parts packaging code	QFP
package instruction	TFQFP,
Contacts	64
Reach Compliance Code	unknow
JESD-30 code	S-PQFP-G64
length	10 mm
Number of functions	1
Number of terminals	64
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TFQFP
Package shape	SQUARE
Package form	FLATPACK, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.2 mm
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	SLIC
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	10 mm

Preview

Download Datasheet

View All

Si3232

UAL

R O G R A M M A B L E

C M O S S L I C

WITH

I N E

O N I T O R I N G

Features

Ideal for customer premise applications



Low standby power consumption:

<65 mW per channel



Internal balanced ringing to 65 V

rms



Applications



Cable telephony



Wireless local loop

Description

The Si3232 is a low-voltage CMOS SLIC that offers a low-cost, fully software-

programmable, dual-channel, analog telephone interface for customer premise

(CPE) applications. Internal ringing generation eliminates centralized ringers and

ringing relays, and on-chip subscriber loop testing allows remote line card and

loop diagnostics with no external test equipment or relays. The Si3232 performs

all programmable SLIC functions in compliance with all relevant LSSGR, ITU, and

ETSI specifications; all high-voltage functions are performed by the Si3200

linefeed interface IC. The Si3232 operates from a single 3.3 V supply and

interfaces to a standard SPI bus digital interface for control. The Si3200 operates

from a 3.3 V supply as well as high-voltage battery supplies up to 100 V. The

Si3232 is available in a 64-pin thin quad flat package (TQFP), and the Si3200 is

available in a thermally-enhanced 16-pin small-outline (SOIC) package.

Functional Block Diagram

INT RESET

SCLK

SDI

SDO

VRXPa

VRXNa

VTXPa

VTXNa

VTXPb

VTXNb

VRXPb

VRXNb

VCM

PCLK

Ring Source

Linefeed

& Monitor

Ring Source

Linefeed

& Monitor

Preliminary Rev. 0.96 2/05

fo R

r N ec

D e

e s nd

ig e

ns d



Software programmable parameters:





Ringing frequency, amplitude,

cadence, and waveshape





Two-wire ac impedance





DC loop feed (18–45 mA)



Loop closure and ring trip thresholds





Ground key detect threshold

Automatic switching of up to three

battery supplies

On-hook transmission

Loop or ground start operation with

smooth/abrupt polarity reversal

SPI bus digital interface with

programmable interrupts

3.3 V operation

GR-909 loop diagnostics and

loopback testing

12 kHz/16 kHz pulse metering

Lead-free/RoHS compatible

packages available

Ordering Information

See page 122.

U.S. Patent #6,567,521

U.S. Patent #6,812,744

Other patents pending

Voice over IP/voice over DSL



ISDN terminal adapters

Si3232

SPI

Control

Interface

Si3200

Linefeed

Interface

TIP

RING

Si3200

Linefeed

Interface

TIP

RING

PLL

FSYNC

Si3232

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

Si3232

ABLE

Section

ONTENTS

Page

1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.1. Linefeed Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.2. Power Supply Transients on the Si3200 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.3. DC Feed Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.4. Linefeed Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.5. Automatic Dual Battery Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.6. Ringing Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

4.7. Internal Unbalanced Ringing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

4.8. Ring Trip Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

4.9. Ring Trip Timeout Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

4.10. Ring Trip Debounce Interval . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

4.11. Loop Closure Mask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

4.12. Relay Driver Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44

4.13. Two-Wire Impedance Synthesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

4.14. Audio Path Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

4.15. System Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

4.16. SPI Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

4.17. Si3232 RAM and Register Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

4.18. System Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

5. 8-Bit Control Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

6. 8-Bit Control Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63

7. 16-Bit RAM Address Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90

8. 16-Bit Control Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

9. Pin Descriptions: Si3232 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

10. Pin Descriptions: Si3200 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120

11. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

12. Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .122

12.1. Part Designators (Partial List) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

13. Package Outline: 64-Pin eTQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

14. Package Outline: 16-Pin ESOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

Support Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125

Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .128

fo R

r N ec

D e

e s nd

ig e

ns d

Preliminary Rev. 0.96

SI3232-G-GQR Related Products

	SI3232-G-GQR	SI3232-G-GQ	SI3232-G-FQ
Description	telecom line management ics dual-CH slic only internal 65 vrms	telecom line management ics dual-channel slic	telecom line management ics dual-channel slic
Is it lead-free?	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to
Maker	Silicon Laboratories Inc	Silicon Laboratories Inc	Silicon Laboratories Inc
Parts packaging code	QFP	QFP	QFP
package instruction	TFQFP,	TFQFP,	TFQFP,
Contacts	64	64	64
Reach Compliance Code	unknow	unknow	unknow
JESD-30 code	S-PQFP-G64	S-PQFP-G64	S-PQFP-G64
length	10 mm	10 mm	10 mm
Number of functions	1	1	1
Number of terminals	64	64	64
Maximum operating temperature	85 °C	85 °C	70 °C
Minimum operating temperature	-40 °C	-40 °C	-
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TFQFP	TFQFP	TFQFP
Package shape	SQUARE	SQUARE	SQUARE
Package form	FLATPACK, THIN PROFILE, FINE PITCH	FLATPACK, THIN PROFILE, FINE PITCH	FLATPACK, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	1.2 mm	1.2 mm
Nominal supply voltage	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Telecom integrated circuit types	SLIC	SLIC	SLIC
Temperature level	INDUSTRIAL	INDUSTRIAL	COMMERCIAL
Terminal form	GULL WING	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	40	40	40
width	10 mm	10 mm	10 mm

Recommended Resources

SCA (background music) decoder circuit diagram

Soil moisture indicator circuit

Timing control circuit (5)

LM317 adjustable integrated voltage regulator circuit diagram

L710 vertical broaching machine electrical schematic circuit

Low voltage reference source

A master's design: A few days ago, when I was browsing the Radio World website, I saw this circuit diagram. It is not designed according to the conventional method, so it looks very strange. It is also difficult to unde...; quanzx Analog electronics

A small game (a complete project written in VHDL): A small game (a complete project written in VHDL). Interesting!...; liwenqi FPGA/CPLD

I have created an FPGA group, if you are interested, please join! !: Out of interest, I have created a FPGA group. If you are interested, you can join it! Now the group is almost full! We are clearing people, please join next Monday!! Thank you!!...; 汉江之源 FPGA/CPLD

How can EVC or vc2005 create a lib with a custom class and its methods, and how can it be developed, used and deployed to a pda?: How can EVC or vc2005 create a lib with a custom class and its methods, and how can it be developed, used and deployed to a pda?...; linlintree Embedded System

Who has the STM32F103Zxx 144-pin package library?: It is troublesome to build the package, but what I am most worried about is making mistakes. I hope I can borrow it....; dontium stm32/stm8

15074006: Sir, I don't know much about assembly....; 15074006 MCU

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components