PSMN038-100K
N-channel enhancement mode field-effect transistor
Rev. 01 — 16 January 2001
Product specification
1. Description
SiliconMAX™
1
products use the latest Philips TrenchMOS™
2
technology to achieve
the lowest possible on-state resistance in a SOT96-1 (SO8) package.
Product availability:
PSMN038-100K in SOT96-1 (SO8).
2. Features
s
Very low on-state resistance
s
Fast switching
s
TrenchMOS™ technology.
3. Applications
s
DC to DC convertor
s
Computer motherboards
s
Switch mode power supplies.
c
c
4. Pinning information
Table 1:
Pin
1,2,3
4
5,6,7,8
Pinning - SOT96-1, simplified outline and symbol
Description
source (s)
8
5
d
Simplified outline
Symbol
gate (g)
drain (d)
1
Top view
4
MBK187
g
s
MBB076
SOT96-1 (SO8)
1.
2.
SiliconMAX is a trademark of Royal Philips Electronics.
TrenchMOS is a trademark of Royal Philips Electronics.
Philips Semiconductors
PSMN038-100K
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2:
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference data
Conditions
T
j
= 25 to 150
°C
T
sp
= 80
°C;
Figure 2
and
3
T
sp
= 80
°C;
Figure 1
V
GS
= 10 V; I
D
= 5.2 A; T
j
= 25
°C
Typ
−
−
−
−
33
Max
100
6.3
3.5
150
38
Unit
V
A
W
°C
mΩ
drain-source voltage (DC)
drain current (DC)
total power dissipation
junction temperature
drain-source on-state resistance
Symbol Parameter
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
drain-source voltage (DC)
gate-source voltage (DC)
drain current (DC)
peak drain current
total power dissipation
storage temperature
operating junction temperature
source (diode forward) current (DC) T
sp
= 80
°C
peak source (diode forward) current T
sp
= 25
°C;
pulsed; t
p
≤
10
µs
T
sp
= 80
°C
T
sp
= 25
°C;
pulsed; t
p
≤
10
µs
T
sp
= 80
°C
Conditions
T
j
= 25 to 150
°C
Min
−
−
−
−
−
−55
−55
−
−
Max
100
±20
6.3
50
3.5
+150
+150
3.1
50
Unit
V
V
A
A
W
°C
°C
A
A
Source-drain diode
9397 750 07897
© Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 — 16 January 2001
2 of 13
Philips Semiconductors
PSMN038-100K
N-channel enhancement mode field-effect transistor
03aa17
03aa25
120
P
der
(%)
100
120
Ider
(%)
100
80
80
60
60
40
40
20
20
0
0
25
50
75
100
125
Tsp
0
150
(oC)
175
0
25
50
75
100
125
150 175
Tsp (oC)
P
tot
P
der
=
----------------------
×
100%
P
°
tot
(
25 C
)
V
GS
≥
5 V
I
D
I
der
=
------------------
×
100%
-
I
°
D
(
25 C
)
Fig 1. Normalized total power dissipation as a
function of solder point temperature.
102
I
D
(A)
R
DSon
= V
DS
/ I
D
Fig 2. Normalized continuous drain current as a
function of solder point temperature.
03ad97
tp = 10 µs
100 µs
1 ms
10
1
P
10 ms
δ
=
tp
T
D.C.
100 ms
10-1
tp
T
t
10-2
10-1
1
10
102
V
DS
(V)
103
T
sp
= 25
°C;
I
DM
is single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 07897
© Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 — 16 January 2001
3 of 13
Philips Semiconductors
PSMN038-100K
N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4:
R
th(j-sp)
Thermal characteristics
Conditions
mounted on a metal clad substrate;
Figure 4
Value Unit
20
K/W
thermal resistance from junction to solder
point
Symbol Parameter
7.1 Transient thermal impedance
102
Z
th(j-sp)
(K/W)
10
δ
= 0.5
0.2
0.1
1
0.05
0.02
P
03ad96
δ
=
tp
T
10-1
single pulse
tp
T
t
10-2
10-4
10-3
10-2
10-1
1
10
t
p
(s)
102
T
sp
= 25
°C
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.
9397 750 07897
© Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 — 16 January 2001
4 of 13
Philips Semiconductors
PSMN038-100K
N-channel enhancement mode field-effect transistor
8. Characteristics
Table 5: Characteristics
T
j
= 25
°
C unless otherwise specified
Symbol Parameter
Static characteristics
V
(BR)DSS
drain-source breakdown voltage
V
GS(th)
gate-source threshold voltage
I
D
= 250
µA;
V
GS
= 0 V
I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
T
j
= 25
°C
T
j
= 150
°C
T
j
=
−55 °C
I
DSS
I
GSS
R
DSon
drain-source leakage current
gate-source leakage current
drain-source on-state resistance
V
DS
= 80 V; V
GS
= 0 V; T
j
= 25
°C
V
DS
= 100 V; V
GS
= 0 V; T
j
= 150
°C
V
GS
=
±20
V; V
DS
= 0 V
V
GS
= 10 V; I
D
= 5.2 A;
Figure 7
and
8
T
j
= 25
°C
T
j
= 150
°C
Dynamic characteristics
g
fs
Q
g(tot)
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
SD
t
rr
Q
r
forward transconductance
total gate charge
gate-source charge
gate-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
source-drain (diode forward) voltage I
S
= 2.3 A; V
GS
= 0 V;
Figure 13
reverse recovery time
recovery charge
I
S
= 6.3 A; dI
S
/dt =
−100
A/µs; V
GS
= 0 V
V
DD
= 50 V; I
D
= 1 A; V
GS
= 10 V; R
G
= 6
Ω
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz;
Figure 12
V
DS
= 15 V; I
D
= 6.3 A;
Figure 11
I
D
= 6.3 A; V
DD
= 50 V; V
GS
= 10 V;
Figure 14
−
−
−
−
−
−
−
−
−
−
−
−
−
−
20
43
6.5
16
220
135
15
13
50
25
0.7
85
0.3
−
−
−
21.5
−
−
30
25
80
40
1.1
−
−
S
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
ns
µC
−
−
33
76
38
88
mΩ
mΩ
2
1.2
−
−
−
−
−
−
−
−
−
−
4
−
6
1
0.5
100
V
V
V
µA
mA
nA
100
130
−
V
Conditions
Min
Typ
Max
Unit
1740
−
Source-drain (reverse) diode
9397 750 07897
© Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 — 16 January 2001
5 of 13
Embedded System
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