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CN3850-600BG1521-NSP

Description
Microprocessor
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size245KB,2 Pages
ManufacturerCavium Networks
Download Datasheet Parametric View All

CN3850-600BG1521-NSP Overview

Microprocessor

CN3850-600BG1521-NSP Parametric

Parameter NameAttribute value
MakerCavium Networks
package instruction,
Reach Compliance Codeunknown
Base Number Matches1
Multi-Core MIPS64 Processors
R
OCTEON CN38XX/CN36XX 4 to 16-Core MIPS64 Based SoCs
Product Brief
The OCTEON
®
CN38XX and CN36XX family of Multi-core MIPS64 processors targets intelligent networking,
control plane, storage, and wireless applications in next-generation equipment from 1Gbps to 10Gbps performance.
The family includes 15 di erent software-compatible parts, with four to sixteen cnMIPS64 cores on a single chip
that integrate next-generation networking I/Os along with the most advanced security and application hardware
acceleration to deliver a 3x – 5x performance, power and real-estate value proposition over alternatives.
®
OVERVIEW
FEATURES
Custom CPU Cores Optimized for Networking
BENEFITS
Market Leading Performance
Up to 19.2 billion instructions per second
Up to 10Gbps application performance
-
Up to 20Mpps 64B IP forwarding
-
Up to 10+Gbps for TCP, IPsec, SSL
-
Up to 4Gbps for Regular Expression,
Compression/Decompression
4-16 cnMIPS™ CPU cores (MIPS64/32 compatible) with MMU
Available in 400 MHz to 600 MHz versions
Enhanced MIPS64 integer (Release 2) instruction set
Dual-issue, ve-stage pipeline, optimized latencies
Auto instruction pre-fetching and advanced data
pre-fetching features to minimize memory stalls
High Performance Coherent Memory Subsystem
1MB ECC protected 8-way set associative L2 cache with
locking, partitioning features for optimal performance
Integrated mainstream 128/144-bit DDR2 memory
controller with ECC, up to DDR2-800
Optional, additional, low-latency 2x18-bit or 4x9-bit
RLDRAM2 for content based processing, meta-data
and TCAM connectivity
Packet I/O processing, QoS, TCP acceleration
Support for IPsec, SSL, SRTP, WLAN security (includes
DES, 3DES, AES up to 256-bit, SHA1, SHA-2 up to
SHA-512, RSA, DH)
Regular expression, compression/decompression
Sophisticated Hardware Based QoS Support
Queuing, scheduling
Very low latency for real-time tra c
Reduced BOM cost with essential interfaces for
standalone routers/appliances, line-card and
Services-card Applications
Flexible Architecture allows Host and Co-processor
Implementations
Industry-Standard Programming Model without any need
for Proprietary Tools or Micro-coding
Fully Software Compatible with OCTEON CN31XX and
CN30XX to deliver 1- 16 CPU scalability
3x – 5x Advantage over Alternative System Architectures in
Performance and Power for L4-L7 Data and Security
Services
Integrated Coprocessors for Application Acceleration
Integrated High-Performance Networking Interfaces
Up to 2 sets of I/Os - each con gurable as 4x10/100/1000
Ethernet MACs (RGMII) or SPI-4.2
Integrated 64-bit, 133 MHz PCI-X host or slave
Comprehensive Development Environment with Linux,
VxWorks and C/C++ support
Optimized power consumption: 14W – 30W
Package: 1521 FCBGA
OCTEON
®
CN38XX
- Block Diagram
2315 N. First Street
San Jose, CA 95131
T
408-943-7100
F
408-577-1992
E
sales@cavium.com
www.cavium.com
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