EEWORLDEEWORLDEEWORLD

Part Number

Search

PRA100I2121K0.5%0.02%31

Description
Array/Network Resistor, Isolated, Thin Film, 0.1W, 121000ohm, 50V, 0.5% +/-Tol, -10,10ppm/Cel, 0806,
CategoryPassive components    The resistor   
File Size80KB,5 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Download Datasheet Parametric View All

PRA100I2121K0.5%0.02%31 Overview

Array/Network Resistor, Isolated, Thin Film, 0.1W, 121000ohm, 50V, 0.5% +/-Tol, -10,10ppm/Cel, 0806,

PRA100I2121K0.5%0.02%31 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Objectid981614678
package instructionSMT, 0806
Reach Compliance Codecompliant
Country Of OriginFrance
ECCN codeEAR99
YTEOL7.2
structureChip
Network TypeIsolated
Number of terminals4
Maximum operating temperature155 °C
Minimum operating temperature-55 °C
Package height0.4 mm
Package length2 mm
Package formSMT
Package width1.6 mm
method of packingBox
Rated power dissipation(P)0.1 W
resistance121000 Ω
Resistor typeARRAY/NETWORK RESISTOR
seriesPRA (CNW)
size code0806
technologyTHIN FILM
Temperature Coefficient10 ppm/°C
Tolerance0.5%
Operating Voltage50 V
PRA 100, 135, 182 (CNW)
Vishay Sfernice
High Precision Resistor Chip Arrays
FEATURES
High stability passivated nichrome resistive
layer 0.02 % on ratio, 1000 h at Pn at + 70 °C
Tight TCR (10 ppm/°C) and TCR tracking
(to 1 ppm/°C)
Very low noise < 35 dB and voltage coefficient
< 0.01 ppm/V
Ratio tolerance to 0.01 % (R
200R)
Pre-tinned terminations over nickel barrier
High temperature option (200 °C)
SMD wraparound chip resistor array
Compliant to RoHS directive 2002/95/EC
PRA arrays can be used in most applications requiring a
matched pair (or set) of resistor elements. The networks
provide 1 ppm/°C TCR tracking, a ratio tolerance as tight as
0.01 % and outstanding stability. They are available in 1 mm,
1.35 mm and 1.82 mm pitch.
TYPICAL PERFORMANCE
ABS
TCR
TOL
10 ppm/°C
ABS
0.1 %
TRACKING
2 ppm/°C
RATIO
0.05 %
DIMENSIONS
Suggested Land Pattern
R
S
R
P
Q
F
A
I: Independent resistors
E
Termination
Electrical diagram
R1
R2
R7
R8
DIM.
A
B
C
D
E
(1)
F
G
P
Q
R
S
PRA 100
mm
1.6
0.4
0.65
+ 0.2
- 0.1
+ 0.2
- 0.2
+ 0.15
- 0.15
PRA 135
mil
63
16
mm
1.85
0.4
1.05
+ 0.2
- 0.1
+ 0.2
- 0.2
+ 0.15
- 0.15
PRA 182
mil
72
16
41
10
mm
3.0
0.4
1.3
+ 0.2
- 0.1
+ 0.2
- 0.2
+ 0.35
- 0.15
B
D
C
F
G
mil
118
16
51
10
Number
of resistors:
2 to
8
R1 = R2 = ... R8
25.5
10
0.25
0.25
0.25
E = (N x F) ± 0.2 mm
1
0.4
+ 0.1
-0
E = (N x F) ± 8 mil
53.1
15
41.3
12
40
31.5
1.82
0.4
+ 0.1
-0
C: One common point
N
resistors
R1
E
40
15
27.5
12
40
23.5
1.35
0.4
+ 0.1
-0
72
15
59.8
12
40
70.8
B
C
D
A
R2
R7
R8
0.7
0.3
1
0.6
1.05
0.3
1
0.8
1.52
0.3
1
1.8
F
G
Note
(1)
E depends on number of resistors
* Pb containing terminations are not RoHS compliant, exemptions may apply
** Please see document “Vishay Material Category Policy”:
www.vishay.com/doc?99902
www.vishay.com
66
For technical questions, contact:
sfer@vishay.com
Number
of resistors:
2 to
8
R1 = R2 = ... R8
Document Number: 53033
Revision: 17-Aug-09
Black Gold's FPGA is really bad
BlackGold's FPGA is really bad. The tutorial provided is just pasting the source code into the document. There is no design process at all, no logic block diagram, and the layout is a mess....
lingking Integrated technical exchanges
How can I use CMWAP dial-up to access a wap website under wince 5.0?
I use wince 5.0 system, use TD module, and set "AT+CGDCONT=1,\"IP\",\"CMWAP\" when dialing.", the dialing number is *98*1#, and the browser component is "Pocket Internet Explorer". After the dialing i...
futterfly Embedded System
Talk about my story with embedded system
I have been working for three weeks. During the work, I have a lot of feelings. Now I want to share my experience with you. As a student of an ordinary undergraduate school, I have experienced the lif...
eeleader Talking about work
Using a single-chip microcomputer to configure a CPLD device
Using a single-chip microcomputer to configure CPLD devices. Although ALTERA's programmable logic devices APEX20K, FLEX10K and FLEX6000 are widely used, they use SRAM to store configuration data. Each...
aimyself FPGA/CPLD
Showcase design scheme + STM32F429i porting TI Grilb graphics library project under MDK5.0
Show the design plan + transplant TI grilb graphics library project to STM32F429i under MDK5.0. Although there are still some problems in some places, GRLIB can basically run under STM32F429. Tested "...
蓝雨夜 stm32/stm8
BLDDEMO: There were errors building OSDesign1
oak BLDDEMO: Done Generating OS Design Files CEBUILD: Deleting old build logs CEBUILD: Skipping directly to SYSGEN phase Building dep trees: winceos dcom gdiex ie script servers shellsdk shell rdp wce...
rgqy Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2435  2218  638  776  1617  50  45  13  16  33 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号