514BCA000948AAG datasheet, PDF

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514BCA000948AAG: Descriptionprogrammable oscillators progrmable XO 6 pin 0.7ps RS jtr (ncnr); CategoryPassive components; File Size242KB，36 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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514BCA000948AAG Overview

programmable oscillators progrmable XO 6 pin 0.7ps RS jtr (ncnr)

514BCA000948AAG Parametric

Parameter Name	Attribute value
Manufacture	Silicon Laboratories
Product Category	Programmable Oscillators
RoHS	Yes

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Si514

N Y

-F

REQUENCY

C P

R OG R A MM A B L E

X O ( 1 0 0 k H

Features



250 MH

)

Programmable to any frequency



from 100 kHz to 250 MHz

0.026 ppb frequency tuning



resolution



Glitch suppression on OE, power

on and frequency transitions



Low jitter operation

2- to 4-week lead times



Total stability includes 10-year

aging



Comprehensive production test

coverage includes crystal ESR and

DLD

On-chip LDO for power supply

noise filtering

3.3, 2.5, or 1.8 V operation

Differential (LVPECL, LVDS,

HCSL) or CMOS output options

Optional integrated 1:2 CMOS

fanout buffer

Industry standard 5 x 7 and

3.2 x 5 mm packages

–40 to 85

C operation

Si5602

Ordering Information:

See page 28.

Pin Assignments:

See page 27.

Applications



All-digital PLLs



DAC+ VCXO replacement



SONET/SDH/OTN



3G-SDI/HD-SDI/SDI



Datacom



Industrial automation



FPGA/ASIC clock generation



FPGA synchronization

SDA

SCL

CLK–

Description

The Si514 user-programmable I

C XO utilizes Silicon Laboratories' advanced PLL

technology to provide any frequency from 100 kHz to 250 MHz with programming

resolution of 0.026 parts per billion. The Si514 uses a single integrated crystal and

Silicon Labs’ proprietary DSPLL synthesizer to generate any frequency across this

range using simple I

C commands. Ultra-fine tuning resolution replaces DACs and

VCXOs with an all-digital PLL solution that improves performance where

synchronization is necessary or in free-running reference clock applications. This

solution provides superior supply noise rejection, simplifying low jitter clock

generation in noisy environments. Crystal ESR and DLD are individually

production-tested to guarantee performance and enhance reliability.

The Si514 is factory-configurable for a wide variety of user specifications, including

startup frequency, I

C address, supply voltage, output format, and stability. Specific

configurations are factory-programmed at time of shipment, eliminating long lead

times and non-recurring engineering charges associated with custom frequency

oscillators.

GND

CLK+

Functional Block Diagram

Rev. 1.0 5/12

Si514

Si514

ABLE

Section

ONTENTS

Page

1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.1. Programming a New Output Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.2. Programming a Small Frequency Change (sub ±1000 ppm) . . . . . . . . . . . . . . . . . . 13

2.3. Programming a Large Frequency Change (> ±1000 ppm) . . . . . . . . . . . . . . . . . . . . 14

3. All-Digital PLL Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4. User Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.1. Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

4.2. Register Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.3. I

C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.1. Dual CMOS (1:2 Fanout Buffer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

6. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

7. Package Outline Diagram: 5 x 7 mm, 6-pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

8. PCB Land Pattern: 5 x 7 mm, 6-pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30

9. Package Outline Diagram: 3.2 x 5.0 mm, 6-pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

10. PCB Land Pattern: 3.2 x 5.0 mm, 6-pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

11. Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33

11.1. Si514 Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

11.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34

Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

Rev. 1.0

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