FemtoClock
®
Crystal-to-3.3V LVPECL
Clock Generator
General Description
The ICS843252-04 is a 10Gb/12Gb Ethernet Clock Generator. The
ICS843252-04 can synthesize 10 Gigabit Ethernet and 12 Gigabit
Ethernet with a 25MHz crystal. It can also generate SATA and 10Gb
Fibre Channel reference clock frequencies with the appropriate
choice of crystals. The ICS843252-04 has excellent phase jitter
performance and is packaged in a small 16-pin TSSOP, making it
ideal for use in systems with limited board space.
ICS843252-04
DATA SHEET
Features
•
•
•
•
•
•
•
•
Two differential 3.3V LVPECL output pairs
Crystal input frequency range: 20MHz – 30MHz
Output frequency range: 150MHz – 187.5MHz
VCO frequency: 600MHz – 750MHz
RMS Phase Jitter @ 156.25MHz, (1.875MHz – 20MHz):
0.31ps (typical)
Full 3.3V supply mode
0°C to 70°C ambient operating temperature
Lead-free (RoHS 6) packaging
Configuration Table with 25MHz Crystal
Inputs
Crystal Frequency
(MHz)
25
25
Feedback Divide
30
25
VCO Frequency
(MHz)
750
625
N Output Divide
4
4
Output Frequency
(MHz)
187.5
156.25
Application
12 Gigabit Ethernet
10 Gigabit Ethernet
Configuration Table with Selectable Crystals
Inputs
Crystal Frequency
(MHz)
20
21.25
24
25.5
30
Feedback Divide
30
30
25
25
25
VCO Frequency
(MHz)
600
637.5
600
637.5
750
N Output Divide
4
4
4
4
4
Output Frequency
(MHz)
150
159.375
150
159.375
187.5
Application
SATA
10 Gigabit Ethernet
SATA
10 Gigabit Ethernet
12 Gigabit Ethernet
Block Diagram
OE
nPLL_SEL
REF_CLK
Pullup
Pulldown
Pin Assignment
D
Q
LE
Pulldown
1
1
XTAL_IN
OSC
XTAL_OUT
CLK_SEL
Pulldown
0
Phase
Detector
VCO
600MHz-750MHz
÷4
0
Q0
nQ0
Q1
nQ1
nQ1
Q1
V
CCO
OE
nPLL_SEL
V
CCO
Q0
n
Q0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
XTAL_IN
XTAL_OUT
V
EE
REF_CLK
CLK_SEL
V
CC
V
CCA
FREQ_SEL
ICS843252-04
16-Lead TSSOP
4.4mm x 5.0mm x 0.925mm
package body
G Package
Top View
0 = ÷25
(default)
1 = ÷30
FREQ_SEL
Pulldown
ICS843252AG-04 REVISION A MAY 15, 2013
1
©2013 Integrated Device Technology, Inc.
ICS843252-04 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Pin Description and Pin Characteristic Tables
Table 1. Pin Descriptions
Number
1, 2
3, 6
4
Name
nQ1, Q1
V
CCO
OE
Output
Power
Input
Pullup
Type
Description
Differential clock output pair. LVPECL interface levels.
Output supply pins.
Output enable. When HIGH, clock outputs follow clock input.
When LOW, Qx outputs are forced low, nQx outputs are forced high.
LVCMOS/LVTTL interface levels.
PLL select pin. When LOW, selects the PLL. When HIGH, bypasses the PLL.
LVCMOS/LVTTL interface levels.
Differential clock output pair. LVPECL interface levels.
Pulldown
Frequency select pin. LVCMOS/LVTTL interface levels.
Analog supply pin.
Power supply pin.
Pulldown
Pulldown
Clock select input. When LOW, selects the crystal inputs. When HIGH, selects
REF_CLK. LVCMOS/LVTTL interface levels.
Single-ended reference clock input. LVCMOS/LVTTL interface levels.
Negative supply pin.
Crystal oscillator interface XTAL_IN is the input, XTAL_OUT is the output.
5
7, 8
9
10
11
12
13
14
15,
16
nPLL_SEL
Q0, nQ0
FREQ_SEL
V
CCA
V
CC
CLK_SEL
REF_CLK
V
EE
XTAL_OUT
XTAL_IN
Input
Output
Input
Power
Power
Input
Input
Power
Input
Pulldown
NOTE:
Pullup and Pulldown
refer to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
REF_CLK
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
k
k
ICS843252AG-04 REVISION A MAY 15, 2013
2
©2013 Integrated Device Technology, Inc.
ICS843252-04 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
CC
Inputs, V
I
,
XTAL_IN
Other Inputs
Outputs, I
O
Continuos Current
Surge Current
Package Thermal Impedance,
JA
Storage Temperature, T
STG
Rating
4.6V
0V to V
CC
-0.5V to V
CC
+ 0.5V
50mA
100mA
81.2C/W (0 mps)
-65C to 150C
DC Electrical Characteristics
Table 3A. Power Supply DC Characteristics,
V
CC
= V
CCO
= 3.3V ± 5%, V
EE
= 0V; T
A
= 0°C to 70°C
Symbol
V
CC
V
CCA
V
CCO
I
CC
I
CCA
I
EE
Parameter
Power Supply Voltage
Analog Supply Voltage
Power Supply Voltage
Power Supply Current
Analog Supply Current
Power Supply Current
Test Conditions
Minimum
3.135
V
CC
– 0.16
3.135
Typical
3.3
3.3
3.3
Maximum
3.465
V
CC
3.465
76
16
113
Units
V
V
V
mA
mA
mA
Table 3B. LVCMOS/LVTTL DC Characteristics,
V
CC
= V
CCO
= 3.3V ± 5%, V
EE
= 0V; T
A
= 0°C to 70°C
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
Input
High Current
REF_CLK, CLK_SEL,
nPLL_SEL, FREQ_SEL
OE
Input
Low Current
REF_CLK, CLK_SEL,
nPLL_SEL, FREQ_SEL
OE
V
CC
= V
IN
= 3.465V
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
V
CC
= 3.465V, V
IN
= 0V
-5
-150
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3
0.8
150
5
Units
V
V
µA
µA
µA
µA
I
IL
ICS843252AG-04 REVISION A MAY 15, 2013
3
©2013 Integrated Device Technology, Inc.
ICS843252-04 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Table 3C. LVPECL DC Characteristics,
V
CC
= V
CCO
= 3.3V ± 5%, V
EE
= 0V; T
A
= 0°C to 70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CCO
– 1.4
V
CCO
– 2.0
0.55
Typical
Maximum
V
CCO
– 0.9
V
CCO
– 1.7
1.0
Units
V
V
V
NOTE 1: Output termination with 50 to V
CCO
– 2V.
Table 4. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Capacitive Loading (C
L
)
12
20
Test Conditions
Minimum
Typical
Fundamental
30
50
7
18
MHz
Maximum
Units
pF
pF
AC Electrical Characteristics
Table 5. AC Characteristics,
V
CC
= V
CCO
= 3.3V ± 5%, V
EE
= 0V; T
A
= 0°C to 70°C
Symbol
f
OUT
Parameter
Output Frequency
156.25MHz,
Integration Range: 1.875MHz – 20MHz
tjit(Ø)
RMS Phase Jitter
(Random); NOTE 1
159.375MHz,
Integration Range: 1.875MHz – 20MHz
187.5MHz,
Integration Range: 1.875MHz – 20MHz
tsk(o)
t
R
/ t
F
odc
Output skew; NOTE 2, 3
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
nPLL_SEL = 0
300
48
Test Conditions
Minimum
150
0.31
0.31
0.33
5
Typical
Maximum
187.5
0.40
0.35
0.40
15
600
52
Units
MHz
ps
ps
ps
ps
ps
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. Device will meet specifications after thermal equilibrium has
been reached under these conditions.
NOTE: Characterized using crystal with C
L
= 18pF.
NOTE 1: Please refer to the Phase Noise plots.
NOTE 2:
Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the differential crosspoint.
NOTE 3: These parameters are guaranteed by characterization. Not tested in production.
ICS843252AG-04 REVISION A MAY 15, 2013
4
©2013 Integrated Device Technology, Inc.
ICS843252-04 Data Sheet
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Typical Phase Noise at 156.25MHz
156.25MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.31ps (typical)
Noise Power
dBc
Hz
Offset Frequency (Hz)
ICS843252AG-04 REVISION A MAY 15, 2013
5
©2013 Integrated Device Technology, Inc.
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