ICS87973DYI-147LF datasheet, PDF

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ICS87973DYI-147LF: DescriptionPLL Based Clock Driver, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52; Categorylogic logic; File Size1MB，19 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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ICS87973DYI-147LF Overview

PLL Based Clock Driver, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52

ICS87973DYI-147LF Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFP
package instruction	10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52
Contacts	52
Reach Compliance Code	compliant
Input adjustment	DIFFERENTIAL MUX
JESD-30 code	S-PQFP-G52
JESD-609 code	e3
length	10 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
Number of functions	1
Number of inverted outputs
Number of terminals	52
Actual output times	13
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.2 ns
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10 mm
Base Number Matches	1

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LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/

ZERO DELAY BUFFER

ICS87973I-147

General Description

ICS

HiPerClockS™

Features

•

Fully integrated PLL

Fourteen LVCMOS/LVTTL outputs to include: twelve clocks,

one feedback, one sync

Selectable differential CLK, nCLK inputs or LVCMOS/LVTTL

reference clock inputs

CLK0, CLK1 can accept the following input levels:

LVCMOS or LVTTL

CLK, nCLK pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL

Output frequency range: 10MHz to 150MHz

VCO range: 240MHz to 500MHz

Output skew: 200ps (maximum)

Cycle-to-cycle jitter, (all banks

÷4):

55ps (maximum)

Full 3.3V supply voltage

-40°C to 85°C ambient operating temperature

Compatible with PowerPC™

and Pentium™

Microprocessors

Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

The ICS87973I-147 is a LVCMOS/LVTTL clock

generator and a member of the HiPerClockS™

family

of High Performance Clock Solutions from IDT. The

ICS87973I-147 has three selectable inputs and

provides 14 LVCMOS/LVTTL outputs.

The ICS87973I-147 is a highly flexible device. The three

selectable inputs (1 differential and 2 single ended inputs) are

often used in systems requiring redundant clock sources. Up to

three different output frequencies can be generated among the

three output banks.

The three output banks and feedback output each have their own

output dividers which allows the device to generate a multitude of

different bank frequency ratios and output-to-input frequency

ratios. In addition, 2 outputs in Bank C (QC2, QC3) can be

selected to be inverting or non-inverting. The output frequency

range is 10MHz to 150MHz. The input frequency range is 6MHz to

120MHz.

The ICS87973I-147 also has a QSYNC output which can be used

for system synchronization purposes. It monitors Bank A and

Bank C outputs and goes low one period prior to coincident rising

edges of Bank A and Bank C clocks. QSYNC then goes high again

when the coincident rising edges of Bank A and Bank C occur.

This feature is used primarily in applications where Bank A and

Bank C are running at different frequencies, and is particularly

useful when they are running at non-integer multiples of one

another.

Example Applications:

1.System

Clock generator:

Use a 16.66MHz reference clock to

generate eight 33.33MHz copies for PCI and four 100MHz

copies for the CPU or PCI-X.

2.Line

Card Multiplier:

Multiply differential 62.5MHz from a back

plane to single-ended 125MHz for the line Card ASICs and

Gigabit Ethernet Serdes.

3.Zero

Delay buffer for Synchronous memory:

Fanout up to twelve

100MHz copies from a memory controller reference clock to the

memory chips on a memory module with zero delay.

Pin Assignment

GNDO

QB0

DDO

QB1

GNDO

QB2

DDO

QB3

EXT_FB

GNDO

QFB

FSEL_FB0

39 38 37 36 35 34 33 32 31 30 29 28 27

FSEL_B1

FSEL_B0

FSEL_A1

FSEL_A0

QA3

DDO

QA2

GNDO

QA1

DDO

QA0

GNDO

VCO_SEL

GNDI

2 3 4 5 6 7 8 9 10 11 12 13

FRZ_DATA

FSEL_FB2

PLL_SEL

REF_SEL

CLK_SEL

CLK0

CLK1

CLK

nCLK

nMR/OE

FRZ_CLK

DDA

FSEL_FB1

QSYNC

GNDO

QC0

DDO

QC1

FSEL_C0

FSEL_C1

QC2

DDO

QC3

GNDO

INV_CLK

ICS87973I-147

52-Lead LQFP

10mm x 10mm x 1.4mm package body

Y Package

Top View

IDT™ / ICS™

LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

ICS87973DYI-147 REV. A DECEMBER 9, 2008

ICS87973DYI-147LF Related Products

	ICS87973DYI-147LF	ICS87973DYI-147LFT
Description	PLL Based Clock Driver, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52	PLL Based Clock Driver, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	QFP	QFP
package instruction	10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52	10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52
Contacts	52	52
Reach Compliance Code	compliant	compliant
Input adjustment	DIFFERENTIAL MUX	DIFFERENTIAL MUX
JESD-30 code	S-PQFP-G52	S-PQFP-G52
JESD-609 code	e3	e3
length	10 mm	10 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
Number of functions	1	1
Number of terminals	52	52
Actual output times	13	13
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LQFP	LQFP
Package shape	SQUARE	SQUARE
Package form	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)	260	260
Certification status	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.2 ns	0.2 ns
Maximum seat height	1.6 mm	1.6 mm
Maximum supply voltage (Vsup)	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	MATTE TIN	MATTE TIN
Terminal form	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	10 mm	10 mm
Base Number Matches	1	1

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