DUAL POLARISATION SWITCH TWIN LNB
MULTIPLEX CONTROLLER
ISSUE 1- NOVEMBER 1998
DEVICE DESCRIPTION
The ZLNB101 dual polarisation switch
controller is one of a wide range of satellite
receiver LNB support circuits. It features two
completely independent channels, each
providing two logic outputs under the
control of a voltage sensitive input. It is
intended for use in Twin LNB designs,
replacing many dIscrete components to save
both manufacturing cost and PCB size whilst
improving reliability.
The two inputs of the ZLNB101 have a
nominal threshold of 14.5V. Their threshold
is temperature compensated to minimise
drift. Each features a low and stable input
current that enables transient protection to
be achieved with the addition of only a single
resistor per channel.
Normal and an inverted outputs are
provided for each input. All outputs can
source 15mA and sink 10mA making them
suitable to drive TTL and CMOS logic, pin
diodes and for IF-amp supply switching.
ZLNB100
The ZLNB101 operates from a single supply
of between 5-12V. Its quiescent current is
typically only 4mA and this does not change
significantly with load or logic state. It is
available in either the standard SO8 or space
saving MSOP8 surface mount packages.
Device operating temperature is -40°C to
+85°C to suit a wide range of environmental
conditions.
FEATURES
APPLICATIONS
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provides polarity detection and control
transient resistant
low input current
low supply current
temperature compensated input
threshold
standard and inverted output available
simultaneously wide supply operating
range
dual polarisation switch
eliminates external components
simplifies design
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twin LNBs
IF switch box
LNB switch boxes
75
ZLNB100
Note:-
1) V
POL1
and V
POL2
switching thresholds apply over the whole operating temperature range
specified above.
2) Inputs V
POL1
and V
POL2
are designed to be wired to the power input of an LNB via high value
(10k) resistors. Input V
POL1
controls outputs Vert1 and Hor1. Input V
POL2
controls outputs Vert2
and Hor2. With either input voltage set at or below 14V, the corresponding Vert pin will be high
and Hor pin low. With either input voltage at or above 15.0V, the corresponding Vert pin will be
low and Hor pin high. Any input or output not required may be left open-circuit.
3) All outputs are designed to be compatible with TTL, CMOS, pin diode and IF Amp loads.
4) Applied via 10k resistors
The following block diagram shows a typical block diagram twin LNB design. The ZLNB100
provides the two polarity switches required to decode the two independent receiver feeds.
Additionally the front end bias requirements of the LNB are provided by the ZNBG4000 or
ZNBG6000 offering a very efficient and cost effective solution.
Horizontal
Gain Stage
GaAs/HEMTFET
Antenna
Mixer
Control Input
<=13V-Horizontal
>=14.5V-Vertical
DC Input
13-25V
1
3
+
Horizontal
H/V Output 1
Bias Generator
ZNBG40XX
Series
ZLNB100 Series
Control
Dual H/V Switch
PIN
Diode
MUX
IF down feed
950-1750 MHz
- Standard Band
950-2050 MHz
- Enhanced Band
2
4
+
Mixer
Vertical
H/V Output 2
Vertical
Antenna
Gain Stage
GaAs/HEMTFET
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