Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE
OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL
DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;
TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD
TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.1 (06-05-07)
2
SMSC SCH311X
PRODUCT PREVIEW
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
General Description
The SCH3112/SCH3114/SCH3116 Product Family is a 3.3V (Super I/O Block is 5V tolerant)
PC99/PC2001 compliant Super I/O controller with an LPC interface. The SCH3112/SCH3114/SCH3116
Product Family also includes Hardware Monitoring capabilities, enhanced Security features, Power
Control logic and Motherboard Glue logic.
The SCH3112/SCH3114/SCH3116 Product Family's hardware monitoring capability includes
temperature, voltage and fan speed monitoring. It has the ability to alert the system of out-of-limit
conditions and automatically control the speeds of multiple fans. There are four analog inputs for
monitoring external voltages of +5V, +2.5V, +12V and Vccp (core processor voltage), as well as internal
monitoring of the SIO's VCC, VTR, and Vbat power supplies. The SCH3112/SCH3114/SCH3116 Product
Family includes support for monitoring two external temperatures via thermal diode inputs and an
internal sensor for measuring ambient temperature. The nHWM_INT pin is implemented to indicate out-
of-limit temperature, voltage, and FANTACH conditions. The hardware monitoring block of the
SCH3112/SCH3114/SCH3116 Product Family is accessible via the LPC bus. The same interrupt event
reported on the nHWM_INT pin also creates PME wakeup events. A separate THERMTRIP output is
available, which generates a pulse output on a programmed over temperature condition. This can be
used to generate an reset or shutdown indicator to the system.
The hardware monitoring capability also has programmable automatic FAN control. Three fan
tachometer inputs and three pulse width modulator (PWM) outputs are available.
The Motherboard Glue logic includes various power management and system logic including generation
of nRSMRST, a programmable Clock output, and reset generation. The reset generation includes a
watchdog timer which can be used to generate a reset pulse. The width of this pulse is selectable via
an external strapping option.
The SCH3112/SCH3114/SCH3116 Product Family incorporates complete legacy Super I/O functionality
including an 8042 based keyboard and mouse controller, an IEEE 1284, EPP, and ECP compatible
parallel port, multiple serial ports, one IrDA 1.0 infrared ports, and a floppy disk controller with SMSC's
true CMOS 765B core and enhanced digital data separator, The true CMOS 765B core provides 100%
compatibility with IBM PC/XT and PC/AT architectures and is software and register compatible with
SMSC's proprietary 82077AA core. System related functionality, which offers flexibility to the system
designer, General Purpose I/O control functions, and control of two LED's.
The serial ports are fully functional NS16550 compatible UARTs that support data rates up to 1.5 Mbps.
There are four, 8 pin Serial Ports and two, 4pin Serial Ports. The reduced pin serial ports have selectable
input and output controls. The Serial Ports contain programmable direction control, which will
automatically Drive nRTS when the Output Buffer is loaded, then Drive nRTS when the Output Buffer
is Empty.
The SCH3112/SCH3114/SCH3116 Product Family is ACPI 1.0/2.0 compatible and therefore supports
multiple low power-down modes. It incorporates sophisticated power control circuitry (PCC), which
includes support for keyboard.
The SCH3112/SCH3114/SCH3116 Product Family supports the ISA Plug-and-Play Standard register set
(Version 1.0a). The I/O Address, DMA Channel and hardware IRQ of each logical device in the
SCH3112/SCH3114/SCH3116 Product Family may be reprogrammed through the internal configuration
registers. There are up to 480 (960 - Parallel Port) I/O address location options, a Serialized IRQ
interface, and Three DMA channels.
SMSC SCH311X
3
Revision 1.1 (06-05-07)
PRODUCT PREVIEW
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Table 1 Device Specific Summary
FUNCTION
LPC Bus Interface
Legacy functional
Blocks
(
1.
)
Floppy on Parallel
Port Option
Reset Generator
Serial Ports
Programmable
Clock Output
IDE / PCI Reset
Outputs
Power Button / AC
Fail Support
GPIOs
GPIO with VID
Compatible Inputs
Dedicated GPIOs
Hardware Monitor
SCH3112
YES
YES
SCH3114
YES
YES
SCH3116
YES
YES
YES
YES
YES
YES
2
YES
YES
4
YES
YES
6
(
2.
)
YES
YES
YES
NO
YES
YES
NO
40
6
40
6
40
6
16
YES
0
YES
0
YES
1. Legacy Blocks include floppy disk, parallel port, watchdog timer and keyboard controller
2. 2 of the 6 serial ports have 4 pin interfaces
Revision 1.1 (06-05-07)
4
SMSC SCH311X
PRODUCT PREVIEW
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
More and more people are learning FPGA, and a lot of old materials in the forum have been dug out and downloaded!! :Mad: Good thing!! But there doesn't seem to be much discussion:Sweat:...
I saw on the Internet that you can use the camera function of your phone to see whether the infrared transmitting tube is in working condition. Is it true? I took a picture and there is no difference ...
The following is a record of my first stage of learning ARM. During this period, I basically used Proteus and KEIL to do simple experiments (there is a directory of experiments and download addresses ...
When we were developing a USB flash drive, we selected block device/support Ramdisk in the kernel configuration and created a 4096 byte size. But when we used it, it didn't work. According to the onli...
You can download the free version, which is the popular version, from the Joydrive Harness official website. However, it takes a long time to get started with the new software. It took me a long time ...
In tms320c6678.pdf, p124 states: All LVCMOS input and bidirectional pins must not be driven or pulled high until DVDD18 is present. Driving an input or bidirectional pin before DVDD18 is valid could c...
FPGA/CPLD
京公网安备 11010802033920号
EEWORLD
