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CAT1641WI30

Description
Monitoring circuit cpu w/64k
CategoryPower/power management    The power supply circuit   
File Size121KB,18 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
Download Datasheet Parametric View All

CAT1641WI30 Overview

Monitoring circuit cpu w/64k

CAT1641WI30 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codecompli
ECCN codeEAR99
Adjustable thresholdNO
Analog Integrated Circuits - Other TypesPOWER SUPPLY SUPPORT CIRCUIT
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.9 mm
Number of channels1
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width3.9 mm
Base Number Matches1
CAT1640, CAT1641
Supervisory Circuits with I C Serial 64K
CMOS EEPROM
FEATURES
s
Precision power supply voltage monitor
s
3.0V to 5.5V operation
s
Low power CMOS technology
s
64-Byte page write buffer
s
1,000,000 Program/Erase cycles
s
100 year data retention
H
2
GEN
FR
ALO
EE
LE
A
D
F
R
E
E
TM
— 5V, 3.3V and 3V systems
- +5.0V (+/- 5%, +/- 10%)
- +3.3V (+/- 5%, +/- 10%)
- +3.0V (+/- 10%)
s
Active low reset, CAT1640
s
Active high reset, CAT1641
s
Valid reset guaranteed at V
CC
=1V
s
400kHz I
2
C bus
s
8-pin DIP, SOIC, TSSOP and TDFN packages
s
Industrial temperature range
DESCRIPTION
The CAT1640 and CAT1641 are complete memory and
supervisory solutions for microcontroller-based systems.
A 64kbit serial EEPROM memory and a system power
supervisor with brown-out protection are integrated
together in low power CMOS technology. Memory
interface is via a 400kHz I
2
C bus.
active, preventing the system microcontroller, ASIC or
peripherals from operating. Reset signals become inactive
typically 200 ms after the supply voltage exceeds the reset
threshold level. With both active high and low reset options,
interface to microcontrollers and other ICs is simple. In
addition, the
RESET
(CAT1640) pin can be used as an
input for push-button manual reset capability.
The CAT1640 provides a precision V
CC
sense circuit
and drives an open drain output,
RESET
low whenever The CAT1640/41 memory features a 64-byte page. In
addition, hardware data protection is provided by a V
CC
V
CC
falls below the reset threshold voltage.
sense circuit that prevents writes to memory whenever V
CC
The CAT1641 provides a precision VCC sense circuit falls below the reset threshold or until V
CC
reaches the reset
that drives an open drain output, RESET high whenever threshold during power up.
VCC falls below the reset threshold voltage.
Available packages include an 8-pin DIP, SOIC, TSSOP
The power supply monitor and reset circuit protect and 4.9 x 3mm TDFN.
memory and system controllers during power up/down
and against brownout conditions. Five reset threshold
voltages support 5V, 3.3V and 3V systems. If power
supply voltages are out of tolerance reset signals become
PIN CONFIGURATION
PDIP (L) SOIC (W)
A0 1
A1 2
A2 3
VSS 4
CAT1640
8 VCC
7
RESET
6 SCL
5 SDA
TSSOP (Y)
A0 1
A1 2
A2 3
VSS 4
A0 1
A1 2
A2 3
VSS 4
CAT1641
TDFN PACKAGE: 4.9MM X 3MM
(ZD2)
8 VCC
7
RESET
6 SCL
5 SDA
8 VCC
7 RESET
6 SCL
5 SDA
A0
A1
A2
VSS
1
2
3
4
8
7
VCC
RESET
SCL
SDA
CAT1640
CAT1640
6
5
A0 1
A1 2
A2 3
VSS 4
CAT1641
8 VCC
7 RESET
6 SCL
5 SDA
A0
A1
A2
VSS
1
2
3
4
8
7
VCC
RESET
SCL
SDA
CAT1641
6
5
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice.
1
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