74LVCH244AD-T datasheet, PDF - EEWORLD Datasheet

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74LVCH244AD-T: DescriptionBuffers and Line Drivers 3.3V octal 3-S drvr bus hold; Categorylogic logic; File Size113KB，18 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74LVCH244AD-T Overview

Buffers and Line Drivers 3.3V octal 3-S drvr bus hold

74LVCH244AD-T Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SOIC
package instruction	7.50 MM, PLASTIC, MS-013, SOT163-1, SOP-20
Contacts	20
Reach Compliance Code	unknow
series	LVC/LCX/Z
JESD-30 code	R-PDSO-G20
JESD-609 code	e4
length	12.8 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
Humidity sensitivity level	1
Number of digits	4
Number of functions	2
Number of ports	2
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	9 ns
Certification status	Not Qualified
Maximum seat height	2.65 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	1.2 V
Nominal supply voltage (Vsup)	2.7 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	NICKEL PALLADIUM GOLD
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.5 mm
Base Number Matches	1

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74LVC244A; 74LVCH244A

Octal buffer/line driver; 3-state

Rev. 06 — 13 August 2009

Product data sheet

1. General description

The 74LVC244A; 74LVCH244A is an octal non-inverting buffer/line driver with 3-state

outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE.

A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.

Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise

and fall times.

Inputs can be driven from either 3.3 V or 5.0 V devices. In 3-state operation, outputs can

handle 5 V. These features allow the use of these devices as translators in a mixed

3.3 V and 5 V environment.

The 74LVCH244A bus hold on data inputs eliminates the need for external pull-up

resistors to hold unused inputs.

2. Features

5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low-power consumption

Direct interface with TTL levels

Inputs accept voltages up to 5.5 V

High-impedance when V

= 0 V

Bus hold on all data inputs (74LVCH244A only)

Complies with JEDEC standard no. 8-1A

ESD protection:

HBM JESD22-A114E exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

Speciﬁed from

−40 °C

to +85

°C

and

−40 °C

to +125

°C

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