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HI-3584PCTF

Description
Serial I/O Controller, 1 Channel(s), 0.0152587890625MBps, CMOS, PQCC64, 9 X 9 MM, ROHS COMPLIANT, PLASTIC, CSP-64
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size145KB,15 Pages
ManufacturerHokuriku
Websitehttp://www.hdk.co.jp/english/index_e.htm
Environmental Compliance
Download Datasheet Parametric View All

HI-3584PCTF Overview

Serial I/O Controller, 1 Channel(s), 0.0152587890625MBps, CMOS, PQCC64, 9 X 9 MM, ROHS COMPLIANT, PLASTIC, CSP-64

HI-3584PCTF Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerHokuriku
Parts packaging codeQFN
package instructionHVQCCN,
Contacts64
Reach Compliance Codeunknown
boundary scanNO
maximum clock frequency1 MHz
Maximum data transfer rate0.0152587890625 MBps
External data bus width16
JESD-30 codeS-PQCC-N64
JESD-609 codee3
length9 mm
low power modeNO
Number of serial I/Os1
Number of terminals64
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceMATTE TIN
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width9 mm
uPs/uCs/peripheral integrated circuit typeSERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches1
HI-3584
December 2005
Enhanced ARINC 429
3.3V Serial Transmitter and Dual Receiver
APPLICATIONS
!
Avionics data communication
!
Serial to parallel conversion
!
Parallel to serial conversion
GENERAL DESCRIPTION
The HI-3584 from Holt Integrated Circuits is a silicon gate
CMOS device for interfacing a 16-bit parallel data bus to the
ARINC 429 serial bus. The HI-3584 design offers many
enhancements to the industry standard HI-8282
architecture. The device provides two receivers each with
label recognition, a 32 by 32 FIFO, and an analog line
receiver. Up to 16 labels may be programmed for each
receiver. The independent transmitter also has a 32 by 32
FIFO. The status of all three FIFOs can be monitored using
the external status pins or by polling the HI-3584’s status
register.
Other new features include a programmable option of data
or parity in the 32nd bit, and the ability to unscramble the 32
bit word. Also, versions are available with different values
of input resistance to allow users to more easily add
external lightning protection circuitry.
The 16-bit parallel data bus exchanges the 32-bit ARINC
data word in two steps when either loading the transmitter
or interrogating the receivers. The databus and all control
signals are CMOS and TTL compatible.
The HI-3584 applies the ARINC protocol to the receivers
and transmitter. Timing is based on a 1 Megahertz clock.
Additional interface circuitry such as the Holt HI-8585 or
HI-8586 is required to translate the transmitter’s 3.3 volt
logic outputs to ARINC 429 drive levels.
PIN CONFIGURATIONS
(Top View)
(See page 13 for additional pin configuration)
See Note below
64 - N/C
63 - RIN2B
62 - RIN2A
61 - RIN1B
60 - RIN1A
59 - N/C
58 - VDD
57 - VDD
56 - VDD
55 - N/C
54 - N/C
53 - MR
52 - TXCLK
51 - CLK
50 - RSR
49 - N/C
N/C - 1
D/R1 - 2
FF1 - 3
HF1 - 4
D/R2 - 5
FF2 - 6
HF2 - 7
SEL - 8
EN1 - 9
EN2 - 10
N/C - 11
BD15 - 12
BD14 - 13
BD13 - 14
BD12 - 15
BD11 - 16
HI-3584PCI
&
HI-3584PCT
48 - CWSTR
47 - ENTX
46 - 429DO
45 - N/C
44 - N/C
43 - N/C
42 - N/C
41 - 429DO
40 - FFT
39 - HFT
38 - TX/R
37 - PL2
36 - PL1
35 - BD00
34 - BD01
33 - N/C
(Note: All 3 VDD pins must be connected to the same 3.3V supply)
64 - Pin Plastic 9mm x 9mm
Chip-Scale Package
52 - D/R1
51 - RIN2B
50 - RIN2A
49 - RIN1B
48 - RIN1A
47 - VDD
46 - N/C
45 - N/C
44 - MR
43 - TXCLK
42 - CLK
41 - RSR
40 - N/C
FEATURES
!
ARINC specification 429 compatible
!
!
!
!
!
!
!
!
!
!
!
!
!
3.3V logic supply operation
Dual receiver and transmitter interface
Analog line receivers connect directly to ARINC bus
Programmable label recognition
On-chip 16 label memory for each receiver
32 x 32 FIFOs each receiver and transmitter
Independent data rate selection for transmitter
and each receiver
Status register
Data scramble control
32nd transmit bit can be data or parity
Self test mode
Low power
Industrial & full military temperature ranges
FF1 - 1
HF1 - 2
D/R2 - 3
FF2 - 4
HF2 - 5
SEL - 6
EN1 - 7
EN2 - 8
BD15 - 9
BD14 - 10
BD13 - 11
BD12 - 12
BD11 - 13
N/C - 17
BD10 - 18
BD09 - 19
BD08 - 20
BD07 - 21
BD06 - 22
GND - 23
N/C - 24
N/C - 25
N/C - 26
N/C - 27
BD05 - 28
BD04 - 29
BD03 - 30
BD02 - 31
N/C - 32
HI-3584PQI
&
HI-3584PQT
39 - N/C
38 - CWSTR
37 - ENTX
36 - N/C
35 - 429DO
34 - 429DO
33 - N/C
32 - FFT
31 - HFT
30 - TX/R
29 - PL2
28 - PL1
27 - BD00
52 - Pin Plastic Quad Flat Pack (PQFP)
(DS3584 Rev. C)
HOLT INTEGRATED CIRCUITS
www.holtic.com
BD10 - 14
BD09 - 15
BD08 - 16
BD07 - 17
BD06 - 18
N/C - 19
GND - 20
N/C - 21
BD05 - 22
BD04 - 23
BD03 - 24
BD02 - 25
BD01 - 26
12 /05
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