(V = +5 V, T = +25 C, f = 10 MHz, unless otherwise noted)
S
A
Parameter
INPUT STAGE
Maximum Input
2
Equivalent Power in 50
Ω
Noise Floor
Equivalent Power in 50
Ω
Input Resistance
Input Capacitance
DC Bias Voltage
LIMITING AMPLIFIER
Usable Frequency Range
At Limiter Output
Phase Variation at 100 MHz
Limiter Output Current
Versus Temperature
Input Range
3
Maximum Output Voltage
Rise/Fall Time (10%–90%)
LOGARITHMIC AMPLIFIER
±
3 dB Error Dynamic Range
Transfer Slope
4
Over Temperature
Intercept (Log Offset)
4
Over Temperature
Temperature Sensitivity
Linearity Error (Ripple)
Output Voltage
Conditions
(Inputs INHI, INLO)
Differential Drive, p-p
Terminated in 52.3
Ω
R
IN
Terminated 50
Ω
Source
400 MHz Bandwidth
From INHI to INLO
From INHI to INLO
Either Input
(Outputs LMHI, LMLO)
R
LOAD
= R
LIM
= 50
Ω,
to –10 dB Point
Over Input Range –73 dBV to –3 dBV
Nominally 400 mV/R
LIM
–40°C
≤
T
A
≤
+85°C
At Either LMHI or LMLO, wrt VPS2
R
LOAD
= 50
Ω,
40
Ω ≤
R
LIM
≤
400
Ω
(Output VLOG)
From Noise Floor to Maximum Input
f = 10 MHz
f = 100 MHz
–40°C < T
A
< +85°C
f = 10 MHz
f = 100 MHz
–40°C
≤
T
A
≤
+85°C
Input from –80 dBV to +0 dBV
Input = –91 dBV, V
S
= +5 V, +2.7 V
Input = +9 dBV, V
S
= +5 V
Input = –3 dBV, V
S
= +3 V
To Ground
Large Scale Input, +3 dBV, R
L
≥
50
Ω,
C
L
≤
100 pF
Large Scale Input, +3 dBV, R
L
≥
50
Ω,
C
L
≤
100 pF
Min
1
±
3.5
Typ
±
4
+9
+22
1.28
–78
1000
2.5
1.725
Max
1
Units
V
dBV
dBm
nV/√Hz
dBm
Ω
pF
V
MHz
MHz
Degrees
mA
%/°C
dBV
V
ns
800
1200
5
585
±
2
1
–0.008
1.25
0.6
100
20
19.6
20
–108
–108.4
–108
–0.009
±
0.4
0.34
2.34
2.10
50
1.0
0.3
3.5
120
73
5
16
16
0.01
2.0
40
1
207
400
0
–78
1
10
+9
19.5
19.3
–109.5
–111
Minimum Load Resistance, R
L
Maximum Sink Current
Output Resistance
Small-Signal Bandwidth
Output Settling Time to 2%
Rise/Fall Time (10%–90%)
POWER INTERFACES
Supply Voltage, V
S
Quiescent Current
Over Temperature
Disable Current
Additional Bias for Limiter
Logic Level to Enable Power
Input Current when HI
Logic Level to Disable Power
TRANSISTOR COUNT
40
0.75
dB
20.5
mV/dB
mV/dB
20.7
mV/dB
–106.5 dBV
dBV
–105
dBV
dB/°C
dB
V
2.75
V
V
Ω
1.25
mA
Ω
MHz
220
ns
100
ns
6.5
20
23
4
2.25
V
S
60
207
V
mA
mA
µA
mA
V
µA
V
Zero-Signal, LMDR Open
–40°C < T
A
< +85°C
–40°C < T
A
< +85°C
R
LIM
= 400
Ω
(See Text)
HI Condition, –40°C < T
A
< +85°C
3 V at ENBL, –40°C < T
A
< +85°C
LO Condition, –40°C < T
A
< +85°C
# of Transistors
2.7
13
11
2.7
–0.5
NOTES
1
Minimum and maximum specified limits on parameters that are guaranteed but not tested are six sigma values.
2
The input level is specified in “dBV” since logarithmic amplifiers respond strictly to voltage, not power. 0 dBV corresponds to a sinusoidal single-frequency input of
1 V rms. A power level of 0 dBm (1 mW) in a 50
Ω
termination corresponds to an input of 0.2236 V rms. Hence, in the special case of 50
Ω
termination, dBV values
can be converted into dBm by adding a fixed offset of +13 to the dBV rms value.
3
Due to the extremely high Gain Bandwidth Product of the AD8306, the output of either LMHI or LMLO will be unstable for levels below –78 dBV (–65 dBm, re 50
Ω).
4
Standard deviation remains essentially constant over frequency. See Figures 13, 14, 16 and 17.
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Embedded System
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