INTEGRATED CIRCUITS
PDIUSBD11
USB device with serial interface
Product specification
Supersedes data of 1999 Nov 19
1999 Jul 22
Philips
Semiconductors
Philips Semiconductors
Product specification
USB device with serial interface
PDIUSBD11
FEATURES
•
Complies with the Universal Serial Bus specification Rev. 1.1
•
Complies with the ACPI, OnNOW, and USB power management
requirements
DESCRIPTION
The Universal Serial Bus hub PDIUSBD11 is a cost and
feature-optimized USB interface device. It is used in
microcontroller-based systems and communicates with the system
microcontroller over the high speed I
2
C serial bus. This modular
approach to implementing USB functions allows the designer to
choose the optimum system microcontroller from the available wide
variety. This flexibility cuts down the development time, risks, and
costs by allowing the use of the existing architecture and the
firmware investments. This results in the fastest way to develop the
most cost-effective USB peripheral solutions. The PDIUSBD11 is
ideally suited for computer monitors, docking stations, keyboards,
and many other applications that use the I
2
C or the SMBus-based
architecture.
The PDIUSBD11 conforms to the USB specification Rev. 1.1, I
2
C
serial interface and the SMBus specifications. It is fully compliant
with the Human Interface Device Class and Monitor Control Class
specifications. Its low suspend power consumption along with the
programmable LazyClock output allows for easy implementation of
equipment that is compliant to the ACPI, OnNOW, and USB power
management requirements. The low operating power allows the
implementation of bus-powered function.
The PDIUSBD11 is fully backward compatible to the
PDIUSBH11/PDIUSBH11A software. In addition, it also incorporates
the feature enhancements like SoftConnect™, LazyClock,
programmable clock output, lower frequency crystal oscillator,
multiple function endpoints and integration of termination resistors.
All of these feature enhancements contribute to significant cost
savings in the system implementation and at the same time ease the
implementation of advanced USB functionality into the peripherals.
•
Compliant with USB Human Interface Devices and Monitor
Control Class
•
Compliant with System Management Bus Specification Rev. 1.0
•
Integrated SIE (Serial Interface Engine), FIFO memory and
transceivers
•
Automatic USB protocol handling
•
High speed I
2
C Interface (up to 1 Mbit/s)
•
Compatible with the PDIUSBH11 software
•
Software controllable connection to USB bus (SoftConnect™)
•
Low frequency 12 MHz crystal oscillator eases EMI design issues
•
Programmable output clock frequency
•
Bus powered capability with very low suspend current
•
Controllable LazyClock output during suspend
•
Single 3.3 V supply with 5 V tolerant I/O
•
Available in 16-pin DIP and SO packages
•
Full-scan design with high fault coverage (>99%) insures high
quality
•
Higher than 8 kV in-circuit ESD protection lowers cost of extra
components
ORDERING INFORMATION
PACKAGES
16-pin plastic SO
16-pin plastic DIP
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
PDIUSBD11 D
PDIUSBD11 N
NORTH AMERICA
PDIUSBD11 D
PDIUSBD11 N
PKG. DWG. #
SOT162-1
SOT38-4
BLOCK DIAGRAM
12 MHz
UPSTREAM
PORT
D+
1.5kW
D+
SoftConnect™
ANALOG
T
X
/R
X
FULL SPEED
3.3V
D–
PLL
INTEGRATED
RAM
BIT CLOCK
RECOVERY
INTERRUPT
PHILIPS
SIE
MEMORY
MANAGEMENT
UNIT
I
2
C
SLAVE
INTERFACE
SDA
SCL
SV00823
NOTE:
1. This is a conceptual block diagram and does not include each individual signal.
1999 Jul 22
2
853-2050 22023
Philips Semiconductors
Product specification
USB device with serial interface
PDIUSBD11
Analog Transceiver
The transceiver interfaces directly to the USB cables through some
termination resistors. They are capable of transmitting and receiving
serial data at “full speed” (12 Mbit/s) only.
I
2
C Slave Interface
This block implements the necessary I
2
C interface protocol. A slave
I
2
C allows for simple micro-coding. An interrupt is used to alert the
microcontroller whenever the PDIUSBD11 needs attention. As a
slave I
2
C device, the PDIUSBD11 I
2
C clock: SCL is an input and is
controlled by the microcontroller. The I
2
C interface can run up to
1 Mbit/s.
PLL
A 12 MHz to 48 MHz clock multiplier PLL (Phase-Locked Loop) is
integrated on-chip. This allows for the use of low-cost 12 MHz
crystal. EMI is also minimized due to lower frequency crystal. No
external components are needed for the operation of the PLL.
Bit Clock Recovery
The bit clock recovery circuit recovers the clock from the incoming
USB data stream using 4X over-sampling principle. It is able to track
jitter and frequency drift specified by the USB specification.
Philips Serial Interface Engine (PSIE)
The Philips SIE implements the full USB protocol layer. It is
completely hardwired for speed and needs no firmware intervention.
The functions of this block include: synchronization pattern
recognition, parallel/serial conversion, bit stuffing/de-stuffing, CRC
checking/generation, PID verification/generation, address
recognition, handshake evaluation/generation.
SoftConnect
™
The connection to the USB is accomplished by bringing D+ (for
high-speed USB device) high through a 1.5 kW pull-up resistor. In
the PDIUSBD11, the 1.5 kW pull-up resistor is integrated on-chip
and is not connected to V
CC
by default. The connection of the
internal resistor to Vcc is established through a command sent by
the external/system microcontroller. This allows the system
microcontroller to complete its initialization sequence before
deciding to establish connection to the USB. Re-initialization of the
USB bus connection can also be affected without requiring the pull
out of the cable.
The PDIUSBD11 will check for USB VBUS availability before the
connection can be established. VBUS sensing is provided through
VBUS pin.
It should be noted that the tolerance of the internal resistors is
higher (30%) than that specified by the USB specification (5%).
However, the overall V
SE
voltage specification for the connection
can still be met with good margin. The decision to make sure of this
feature lies with the users.
SoftConnect™ is a patent pending technology from Philips
Semiconductors.
Memory Management Unit (MMU) and Integrated
RAM
The MMU and the integrated RAM is used to handle the large
difference in data rate between USB, running in bursts of 12 Mbit/s
and the I
2
C interface to the microcontroller, running at up to 1 Mbit/s.
This allows the microcontroller to read and write USB packets at its
own speed through I
2
C.
ENDPOINT DESCRIPTIONS
ENDPOINT#
ENDPOINT INDEX
2
3
5
4
6
7
8
9
TRANSFER TYPE
DIRECTION
OUT
IN
OUT
IN
OUT
IN
OUT
IN
MAX
PACKET SIZE
(BYTES)
8
8
8
8
8
8
8
8
0
1
2
3
Control
Generic
Generic
Generic
NOTE:
1. Generic endpoint can be used for Interrupt or Bulk endpoint.
1999 Jul 22
3
Philips Semiconductors
Product specification
USB device with serial interface
PDIUSBD11
PIN DESCRIPTION
PIN NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIN SYMBOL
TEST
RESET_N
XTAL1
XTAL2
CLKOUT
V
CC
SUSPEND
INT_N
SDA
SCL
GND
DP
DM
AGND
AV
CC
VBUS
TYPE
Input
Input
Input
Output
Output
Power
Output
Output
I/O
I/O
Power
AI/O
AI/O
Power
Power
Input
OD6
OD6
OD6
OD6
3 mA
ST
DRIVE
DESCRIPTION
Connect to GND for normal operation
Power-on reset
Crystal connection 1 (12MHz)
Crystal connection 2 (12MHz)
Programmable output clock for external devices
Voltage supply 3.3V±0.3V
Device is in suspended state
Connect to microcontroller interrupt
I
2
C bi-directional data
I
2
C bit-clock
Ground reference
USB D+ connection
USB D– connection
Analog ground reference
Analog voltage supply 3.3V±0.3V
USB VBUS sensing pin
NOTES:
1. Signals ending in _N indicate active LOW signals.
ST: Schmitt Trigger
OD6: Open Drain with 6 mA drive
AI/O: Analog I/O
APPLICATION DIAGRAM
3.3V
USB Upstream
12 MHz
CLKOUT
I
2
C
D11
µC
FUNCTIONAL BLOCK
e.g. Monitor Control, Mouse, Keyboard, ...
SV00824
1999 Jul 22
4
Philips Semiconductors
Product specification
USB device with serial interface
PDIUSBD11
I
2
C Interface
The
bus is used to interface to an external microcontroller
needed to control the operation of the USB device. For cost
consideration, the target system microcontroller can be shared and
utilized for both the functional part as well as the USB protocol
interfacing. The PDIUSBD11 implements a slave I
2
C interface.
When the PDIUSBD11 needs to communicate with the
microcontroller it asserts an interrupt signal. The microcontroller
services this interrupt by reading the appropriate status register on
the PDIUSBD11 through the I
2
C bus. (For more information about
the I
2
C serial bus, refer to the
I
2
C Handbook,
Philips order number
9397 750 00013).
The I
2
C interface on the PDIUSBD11 defines two types of
transactions:
I
2
C
Protocol
An I
2
C transaction starts with a Start Condition, followed by an
address. When the address matches either the command or data
address the transaction starts and runs until a Stop Condition or
another Start Condition (repeated start) occurs.
The command address is write-only and is unable to do a read. The
next bytes in the message are interpreted as commands. Several
command bytes can be sent after one command address. Each of
the command bytes is acknowledged and passed on to the Memory
Management Unit inside the PDIUSBD11.
When the Start Condition address matches the data address, the
next bytes are interpreted as data. When the RW bit in the address
indicates a
master writes data to slave
(=‘0’) the bytes are received,
acknowledged and passed on to the Memory Management Unit. If
the RW bit in the address indicates a
master reads data from slave
(=‘1’) the PDIUSBD11 will send data to the master. The I
2
C-master
must acknowledge all data bytes except the last one. In this way the
I
2
C interface knows when the last byte has been transmitted and it
then releases the SDA line so that the master controller can
generate the Stop Condition.
Repeated start support allows another packet to be sent without
generating a Stop Condition.
•
command transaction
– A command transaction is used to
define which data (e.g., status byte, buffer data, ...) will be read
from/written to the USB interface in the next data transaction. A
data transaction usually follows a command transaction.
– A data transaction reads data from/writes
data to the USB interface. The meaning of the data is dependent
on the command transaction which was sent before the data
transaction.
•
data transaction
Two addresses are used to differentiate between command and
data transactions. Writing to the command address is interpreted as
a command, while reading from/writing to the data address is used
to transfer data between the PDIUSBH11A and the controller.
Timing
The I
2
C interface in the PDIUSBD11 can support clock speeds up to
1 MHz.
ADDRESS TABLE
Type of Address
Command
Data
Physical Address
MSB to LSB
(Binary)
0011 011
0011 010
1999 Jul 22
5
京公网安备 11010802033920号
EEWORLD
