CS4226
Surround Sound Codec
Features
Stereo 20-bit A/D converters
Six 20-bit D/A converters
S/PDIF receiver
– AC-3 & MPEG auto-detect capability
Description
The CS4226 is a single-chip codec providing stereo an-
alog-to-digital and six digital-to-analog converters using
Delta-Sigma conversion techniques. This +5V device
also contains volume control independently selectable
for each of the six D/A channels. An S/PDIF receiver is
included as a digital input channel. Applications include
Dolby Pro-logic , Dolby Digital AC-3
,
THX
and
DTS home theater systems, DSP based car audio sys-
tems, and other multi-channel applications.
ORDERING INFORMATION
CS4226-KQ -10° to +70° C
CS4226-KQZ -10° to +70° C
CS4226-BQ -40° to +85° C
CS4226-BQZ -40° to +85° C
CS4226-DQ -40° to +85° C
CDB4226
44-pin TQFP
44-pin TQFP Lead Free
44-pin TQFP
44-pin TQFP Lead Free
44-pin TQFP
Evaluation Board
I
SCL/CCLK SDA/CDOUT AD1/CDIN AD0/CS I
2
C/SPI
PDN
Control Port
DAC#1
LRCK
DAC#2
Volume
Control
VD+ VA+
Voltage
Reference
CMOUT
AOUT1
AOUT2
AOUT3
AOUT4
AOUT5
AOUT6
AINAUX
AIN1L
AIN1R
AIN2L/FREQ0
AIN2R/FREQ1
AIN3L/AUTODATA
AIN3R/AUDIO
AGND1
AGND2
Serial Audio Data Interface
DAC#3
DAC#4
DAC#5
DAC#6
Mono
ADC
Left
ADC
Right
ADC
Volume
Control
Volume
Control
Volume
Control
Volume
Control
SDIN3
Input
Gain
DEM
DEM
Clock Osc/
Divider
CLKOUT XTI
XTO
PLL
S/PDIF RX/Auxiliary Input
FILT HOLD/RUBIT
LRCKAUX/RX3
RX1 DGND1 DGND2
DATAUX/RX4
SCLKAUX/RX2
www.cirrus.com
Copyright Cirrus Logic, Inc. 2004
(All Rights Reserved)
Input MUX
MUX
Digital Filters
SDOUT1
SDOUT2
OVL/ERR
Analog Low Pass and
Output Stage
Digital Filters
SCLK
SDIN1
SDIN2
Volume
Control
NOV ‘04
DS188F4
1
®
®
®
®
108 dB DAC signal-to-noise ratio (EIAJ)
Mono 20-bit A/D converter
Programmable Input gain & output
attenuation
On-chip anti-aliasing and output smoothing
filters
De-emphasis for 32 kHz, 44.1 kHz, 48 kHz
©
CS4226
TABLE OF CONTENTS
1 CHARACTERISTICS/SPECIFICATIONS .................................................................................. 4
SPECIFIED OPERATING CONDITIONS ................................................................................. 4
ABSOLUTE MAXIMUM RATINGS ........................................................................................... 4
ANALOG CHARACTERISTICS ................................................................................................ 5
SWITCHING CHARACTERISTICS .......................................................................................... 7
SWITCHING CHARACTERISTICS - CONTROL PORT........................................................... 8
S/PDIF RECEIVER CHARACTERISTICS ................................................................................ 9
DIGITAL CHARACTERISTICS ................................................................................................. 9
2 FUNCTIONAL DESCRIPTION ................................................................................................ 11
2.1 Overview .......................................................................................................................... 11
2.2 Analog Inputs ................................................................................................................... 11
2.3 Analog Outputs ................................................................................................................ 12
2.4 Clock Generation ............................................................................................................. 13
2.5 Digital Interfaces .............................................................................................................. 14
2.6 Control Port Signals ......................................................................................................... 18
2.7 Power-up/Reset/Power Down Mode ................................................................................ 20
2.8 DAC Calibration ............................................................................................................... 20
2.9 De-Emphasis ................................................................................................................... 20
2.10 HOLD Function .............................................................................................................. 21
2.11 Power Supply, Layout, and Grounding .......................................................................... 21
2.12 ADC and DAC Filter Response Plots ............................................................................. 22
3 REGISTER DESCRIPTION ..................................................................................................... 24
4 PIN DESCRIPTION .................................................................................................................. 32
5 PARAMETER DEFINITIONS ................................................................................................... 36
6 PACKAGE DIMENSIONS ........................................................................................................ 37
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to
www.cirrus.com
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject
to change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale
supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by
Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights
of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work
rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and
gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other parts of Cirrus. This
consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material
and controlled under the “Foreign Exchange and Foreign Trade Law” is to be exported or taken out of Japan. An export license and/or quota needs to be obtained
from the competent authorities of the Chinese Government if any of the products or technologies described in this material is subject to the PRC Foreign Trade Law
and is to be exported or taken out of the PRC.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-
ERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE
IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, LIFE SUPPORT PRODUCTS OR OTHER
CRITICAL APPLICATIONS (INCLUDING MEDICAL DEVICES, AIRCRAFT SYSTEMS OR COMPONENTS AND PERSONAL OR AUTOMOTIVE SAFETY OR SE-
CURITY DEVICES). INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIR-
RUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY
AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR
CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO
FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUD-
ING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks
or service marks of their respective owners.
I
2
C is a registered trademark of Philips Semiconductor. Purchase of I
2
C Components of Cirrus Logic, Inc., or one of its sublicensed Associated Companies conveys
a license under the Philips I
2
C Patent Rights to use those components in a standard I
2
C system.
DTS is a registered trademark of the Digital Theater Systems, Inc.
Dolby, Dolby Digital, AC-3, AAC, and Pro Logic are registered trademarks of Dolby Laboratories, Inc.
THX is a registered trademark of Lucasfilms Ltd.
2
DS188F4
CS4226
LIST OF FIGURES
Figure 1. Recommended Connection Diagram............................................................................. 10
Figure 2. Optional Line Input Buffer .............................................................................................. 11
Figure 3. Butterworth Filter Examples........................................................................................... 13
Figure 4. Audio DSP and Auxiliary Port Data Input Formats ........................................................ 15
Figure 5. Audio DSP Port Data Output Formats ........................................................................... 16
Figure 6. One data line modes...................................................................................................... 16
Figure 7. Control Port Timing, SPI mode ...................................................................................... 19
Figure 8. Control Port Timing, I
2
C Mode....................................................................................... 20
Figure 9. De-emphasis Curve ....................................................................................................... 21
Figure 10. 20-bit ADC Filter Response ......................................................................................... 23
Figure 11. 20-bit ADC Passband Ripple ....................................................................................... 23
Figure 12. 20-bit ADC Transition Band ......................................................................................... 23
Figure 13. DAC Frequency Response .......................................................................................... 23
Figure 14. DAC Passband Ripple ................................................................................................. 23
Figure 15. DAC Transition Band ................................................................................................... 23
LIST OF TABLES
Table 1. Change History ................................................................................................................. 3
Table 2. Single-ended vs Differential Input Pin Assignments ....................................................... 11
Table 3. High Pass Filter Characteristics ...................................................................................... 12
Table 4. DSP Serial Interface Ports .............................................................................................. 15
Table 5. S/PDIF Receiver Status Outputs..................................................................................... 18
Table 1. Change History
Revision
F1
F2
F3
F4
Date
September 1998
March 2003
September 2004
November 2004
Initial release.
Update drawings.
Added lead free part information.
Added lead free part information.
Changes
DS188F4
3
CS4226
(Full Scale Input Sine wave, 990.52 Hz; Fs = 44.1 kHz (PLL in use);
Measurement Bandwidth is 20 Hz to 20 kHz, unless specified otherwise.)
CS4226-KQ/-KQZ
Parameter
Symbol
Min
Typ
Max
CS4226-BQ/-BQZ/-DQ
Min
Typ
Max
Units
ANALOG CHARACTERISTICS
Analog Input Characteristics
- Minimum gain setting (0 dB) Differential Input; unless otherwise specified.
ADC Resolution
Stereo Audio channels
16
-
20
16
-
20
Bits
Mono channel
16
-
20
16
-
20
Bits
Total Harmonic Distortion
Dynamic Range
(A weighted, Stereo)
(unweighted, Stereo)
(A weighted, Mono)
(Note 3) THD+N
(Note 1)
THD
92
-
89
-
-
-
-
8
2.7
-
0.90
-
(Note 4)
10
-
-
(Note 5)
(Note 5)
(Note 6)
t
gd
∆
t
gd
0.02
-
27.56
80
-
-
0.003
95
92
-
-88
-
90
0.1
9
3
-
1.0
100
-
-
2.3
-
-
-
-
15/Fs
-
-
-
-
-
-82
-72
-
-
10
3.3
0
1.10
-
-
15
-
20.0
0.01
-
-
0
90
-
87
-
-
-
-
8
2.7
-
0.90
-
10
-
-
0.02
-
80
-
-
0.003
93
90
-
-86
-
90
0.1
9
3
-
1.0
100
-
-
2.3
-
-
-
-
15/Fs
-
-
-
-
-
-80
-70
-
-
10
3.3
0
1.10
-
-
15
-
20.0
0.01
5617.2
-
-
0
%
dB
dB
dB
dB
dB
dB
dB
dB
dB
LSB
Vrms
ppm/°C
kΩ
pF
V
kHz
dB
kHz
dB
s
µs
Total Harmonic
-1 dB, Stereo
Distortion + Noise -1 dB, Mono
Interchannel Isolation
Interchannel Gain Mismatch
Programmable Input Gain Span
Gain Step Size
Offset Error (with high pass filter)
Full Scale Input Voltage (Single Ended):
Gain Drift
Input Resistance
Input Capacitance
CMOUT Output Voltage
A/D Decimation Filter Characteristics
Passband
Passband Ripple
Stopband
Stopband Attenuation
Group Delay Variation vs. Frequency
5617.2 27.56
Group Delay (Fs = Output Sample Rate) (Note 7)
Notes: 3. Referenced to typical full-scale differential input voltage (2Vrms).
4. Input resistance is for the input selected. Non-selected inputs have a very high (>1MΩ) input resistance.
The input resistance will vary with gain value selected, but will always be greater than the min. value
specified
5. Filter characteristics scale with output sample rate.
6. The analog modulator samples the input at 5.6448 MHz for an output sample rate of 44.1 kHz. There is
no rejection of input signals which are multiples of the sampling frequency (n × 5.6448 MHz ±20.0 kHz
where n = 0,1,2,3...).
7. Group delay for Fs = 44.1 kHz, t
gd
= 15/44.1 kHz = 340
µs
DS188F4
5
京公网安备 11010802033920号
EEWORLD
