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TC4013BP

Description
dual D-type flip flop
Categorylogic    logic   
File Size337KB,9 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Environmental Compliance
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TC4013BP Overview

dual D-type flip flop

TC4013BP Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeDIP
package instructionDIP, DIP14,.3
Contacts14
Reach Compliance Codeunknow
series4000/14000/40000
JESD-30 codeR-PDIP-T14
length19.25 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeD FLIP-FLOP
Maximum Frequency@Nom-Su3500000 Hz
MaximumI(ol)0.00061 A
Number of digits1
Number of functions2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5/15 V
Prop。Delay @ Nom-Su300 ns
propagation delay (tpd)300 ns
Certification statusNot Qualified
Maximum seat height4.45 mm
Maximum supply voltage (Vsup)18 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typePOSITIVE EDGE
width7.62 mm
minfmax12 MHz
Base Number Matches1
TC4013BP/BF/BFN
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC4013BP,TC4013BF,TC4013BFN
TC4013B Dual D-Type Flip Flop
TC4013B contains two independent circuits of D type flip-flop.
The input level applied to DATA input are transferred to Q and
Q output by rising edge of the clock pulse. When SET input is
placed at “H”, and RESET input is placed at “L”, outputs become
Q = “H”, and Q = “L”. When RESET input is placed at “H”, and
SET input is placed at “L”, outputs become Q = “L”, and Q =
“H”. When both of RESET input and SET input are at “H”,
outputs become Q = “H” and Q = “H”.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC4013BP
Pin Assignment
TC4013BF
TC4013BFN
Block Diagram
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
SOL14-P-150-1.27
: 0.96 g (typ.)
: 0.18 g (typ.)
: 0.12 g (typ.)
1
2007-10-01

TC4013BP Related Products

TC4013BP TC4013BFN TC4013BP_07
Description dual D-type flip flop dual D-type flip flop dual D-type flip flop
Is it lead-free? Lead free Lead free -
Is it Rohs certified? conform to conform to -
Parts packaging code DIP SOIC -
package instruction DIP, DIP14,.3 SOP, SOP14,.25 -
Contacts 14 14 -
Reach Compliance Code unknow unknow -
series 4000/14000/40000 4000/14000/40000 -
JESD-30 code R-PDIP-T14 R-PDSO-G14 -
length 19.25 mm 8.65 mm -
Load capacitance (CL) 50 pF 50 pF -
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP -
Maximum Frequency@Nom-Su 3500000 Hz 3500000 Hz -
MaximumI(ol) 0.00061 A 0.00061 A -
Number of digits 1 1 -
Number of functions 2 2 -
Number of terminals 14 14 -
Maximum operating temperature 85 °C 85 °C -
Minimum operating temperature -40 °C -40 °C -
Output polarity COMPLEMENTARY COMPLEMENTARY -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code DIP SOP -
Encapsulate equivalent code DIP14,.3 SOP14,.25 -
Package shape RECTANGULAR RECTANGULAR -
Package form IN-LINE SMALL OUTLINE -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED -
power supply 5/15 V 5/15 V -
Prop。Delay @ Nom-Su 300 ns 300 ns -
propagation delay (tpd) 300 ns 300 ns -
Certification status Not Qualified Not Qualified -
Maximum seat height 4.45 mm 1.75 mm -
Maximum supply voltage (Vsup) 18 V 18 V -
Minimum supply voltage (Vsup) 3 V 3 V -
Nominal supply voltage (Vsup) 5 V 5 V -
surface mount NO YES -
technology CMOS CMOS -
Temperature level INDUSTRIAL INDUSTRIAL -
Terminal form THROUGH-HOLE GULL WING -
Terminal pitch 2.54 mm 1.27 mm -
Terminal location DUAL DUAL -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED -
Trigger type POSITIVE EDGE POSITIVE EDGE -
width 7.62 mm 3.9 mm -
minfmax 12 MHz 12 MHz -
Base Number Matches 1 1 -

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