= 15 pF and CMOS signal levels, unless otherwise noted.
Table 1.
Parameter
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
Opposing-Direction
Symbol
A Grade
Min
Typ Max
1
100
40
B Grade
Min Typ Max
10
50
3
C Grade
Min Typ Max
90
32
2
11.1
10
2
5
Unit
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
Test Conditions
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Within PWD limit
Between any two units
t
PHL,
t
PLH
PWD
PW
t
PSK
t
PSKCD
t
PSKOD
50
65
11
20
32
5
18
1000
50
50
50
100
15
3
6
27
0.5
3
8.3
7 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier.
Table 2.
Parameter
SUPPLY CURRENT
ADuM4400
ADuM4401
ADuM4402
Symbol
I
DD1
I
DD2
I
DD1
I
DD2
I
DD1
I
DD2
1 Mbps—A, B, C Grades
Min
Typ
Max
2.9
1.2
2.5
1.6
2.0
2.0
3.5
1.9
3.2
2.4
2.8
2.8
10 Mbps—B, C Grades
Min
Typ
Max
9.0
3.0
7.4
4.4
6.0
6.0
11.6
5.5
10.6
6.5
7.5
7.5
90 Mbps—C Grade
Min
Typ
Max
72
19
59
32
51
51
100
36
82
46
62
62
Unit
mA
mA
mA
mA
mA
mA
Test Conditions
Table 3. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltage
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
1
Output Disable Propagation Delay
Output Enable Propagation Delay
Refresh Rate
1
Symbol
V
IH
V
IL
V
OH
I
I
I
DDI(Q)
I
DDO(Q)
I
DDI(D)
I
DDO(D)
t
R
/t
F
|CM|
t
PHZ
,t
PLH
t
PZH
,t
PZL
f
r
Min
2.0
Typ
Max
Unit
V
V
V
V
μA
mA
mA
mA/Mbps
mA/Mbps
ns
kV/μs
Test Conditions
0.8
V
DDx
− 0.1
V
DDx
− 0.4
−10
5.0
4.8
+0.01
0.57
0.23
0.20
0.05
2.5
35
6
6
1.2
8
8
+10
0.83
0.35
I
Ox
= −20 μA, V
Ix
= V
IxH
I
Ox
= −4 mA, V
Ix
= V
IxH
0 V ≤ V
I x
≤ V
DDx
25
ns
ns
Mbps
10% to 90%
V
Ix
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
High/low-to-high impedance
High impedance-to-high/low
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD
. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. 0 | Page 3 of 20
ADuM4400/ADuM4401/ADuM4402
ELECTRICAL CHARACTERISTICS—3 V OPERATION
All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 3.0 V. Minimum/maximum specifications apply over the entire recommended
operation range: 2.7 V ≤ V
DD1
≤ 3.6 V, 2.7 V ≤ V
DD2
≤ 3.6 V, and −40°C ≤ T
A
≤ 105°C, unless otherwise noted. Switching specifications are
tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted.
Table 4.
Parameter
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
Opposing-Direction
Symbol
A Grade
Min
Typ Max
1
100
40
B Grade
Min Typ Max
10
50
3
C Grade
Min Typ Max
90
45
2
11.1
16
2
5
Unit
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
Test Conditions
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Within PWD limit
Between any two units
t
PHL
, t
PLH
PWD
PW
t
PSK
t
PSKCD
t
PSKOD
50
75
11
20
38
5
20
1000
50
50
50
100
22
3
6
34
0.5
3
8.3
7 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier.
Table 5.
Parameter
SUPPLY CURRENT
ADuM4400
ADuM4401
ADuM4402
Symbol
I
DD1
I
DD2
I
DD1
I
DD2
I
DD1
I
DD2
1 Mbps—A, B, C Grades
Min
Typ
Max
1.6
0.7
1.4
0.9
1.2
1.2
2.1
1.2
1.9
1.5
1.7
1.7
10 Mbps—B, C Grades
Min
Typ
Max
4.8
1.8
0.1
2.5
3.3
3.3
7.1
2.3
5.6
3.3
4.4
4.4
90 Mbps—C Grade
Min
Typ
Max
37
11
31
17
24
24
54
15
44
24
39
39
Unit
mA
mA
mA
mA
mA
mA
Test Conditions
Table 6. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltage
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
1
Output Disable Propagation Delay
Output Enable Propagation Delay
Refresh Rate
1
Symbol
V
IH
V
IL
V
OH
I
I
I
DDI(Q)
I
DDO(Q)
I
DDI(D)
I
DDO(D)
t
R
/t
F
|CM|
t
PHZ
,t
PLH
t
PZH
,t
PZL
f
r
Min
1.6
Typ
Max
Unit
V
V
V
V
μA
mA
mA
mA/Mbps
mA/Mbps
ns
kV/μs
Test Conditions
0.4
V
DDx
− 0.1
V
DDx
− 0.4
−10
3.0
2.8
+0.01
0.31
0.19
0.10
0.03
3
35
6
6
1.2
8
8
+10
0.49
0.27
I
Ox
= −20 μA, V
Ix
= V
IxH
I
Ox
= −4 mA, V
Ix
= V
IxH
0 V ≤ V
I x
≤ V
DDx
25
ns
ns
Mbps
10% to 90%
V
Ix
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
High/low-to-high impedance
High impedance-to-high/low
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD
. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. 0 | Page 4 of 20
ADuM4400/ADuM4401/ADuM4402
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V OPERATION
All typical specifications are at T
A
= 25°C, V
DD1
= 5 V, V
DD2
= 3.0 V. Minimum/maximum specifications apply over the entire
recommended operation range: 4.5 V ≤ V
DD1
≤ 5.5 V, 2.7 V ≤ V
DD2
≤ 3.6 V, and −40°C ≤ T
A
≤ 105°C, unless otherwise noted. Switching
specifications are tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted.
Table 7.
7 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier.
Parameter
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
Opposing-Direction
Symbol
A Grade
Min
Typ Max
1
50
40
B Grade
Min Typ Max
10
50
3
C Grade
Min Typ Max
90
40
2
11.1
14
2
5
Unit
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
Test Conditions
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Within PWD limit
Between any two units
t
PHL
, t
PLH
PWD
PW
t
PSK
t
PSKCD
t
PSKOD
50
70
11
15
35
5
20
1000
50
50
50
100
22
3
6
30
0.5
3
8.3
Table 8.
Parameter
SUPPLY CURRENT
ADuM4400
ADuM4401
ADuM4402
Symbol
I
DD1
I
DD2
I
DD1
I
DD2
I
DD1
I
DD2
1 Mbps—A, B, C Grades
Min
Typ
Max
2.9
0.7
2.5
0.9
2.0
1.2
3.5
1.2
3.2
1.5
2.8
1.7
10 Mbps—B, C Grades
Min
Typ
Max
9.0
1.8
7.4
2.5
6.0
3.3
11.6
2.3
10.6
3.3
7.5
4.4
90 Mbps—C Grade
Min
Typ Max
72
11
59
17
46
24
100
15
82
24
62
39
Unit
mA
mA
mA
mA
mA
mA
Test Conditions
Table 9. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltage
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
1
Output Disable Propagation Delay
Output Enable Propagation Delay
Refresh Rate
1
Symbol
V
IH
V
IL
V
OH
I
I
I
DDI(Q)
I
DDO(Q)
I
DDI(D)
I
DDO(D)
t
R
/t
F
|CM|
t
PHZ
,t
PLH
t
PZH
,t
PZL
f
r
Min
2.0
Typ
Max
Unit
V
V
V
V
μA
mA
mA
mA/Mbps
mA/Mbps
ns
kV/μs
Test Conditions
0.8
V
DDx
− 0.1
V
DDx
− 0.4
−10
3.0
2.8
+0.01
0.57
0.29
0.20
0.03
3
35
6
6
1.2
8
8
+10
0.83
0.27
I
Ox
= −20 μA, V
Ix
= V
IxH
I
Ox
= −4 mA, V
Ix
= V
IxH
0 V ≤ V
I x
≤ V
DDx
25
ns
ns
Mbps
10% to 90%
V
Ix
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
High/low-to-high impedance
High impedance-to-high/low
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD
. The common-mode voltage slew rates apply to both
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