W24258
32K
×
8 CMOS STATIC RAM
GENERAL DESCRIPTION
The W24258 is a normal speed, very low power CMOS static RAM organized as 32768
×
8 bits that
operates on a wide voltage range from 2.7V to 5.5V power supply. The W24258 family, W24258-
70LE and W24258-70LI, can meet requirement of various operating temperature. This device is
manufactured using Winbond's high performance CMOS technology.
FEATURES
•
•
•
•
Low power consumption:
−
Active: 350 mW (max.)
−
Standby: 6
µW
(max.)/3V
25
µW
(max.)/5V
Access time: 70 nS (max.)/5V
100 nS (max.)/3V
Single 3V/5V power supply
Fully static operation
•
•
•
•
•
All inputs and outputs directly TTL compatible
Three-state outputs
Battery back-up operation capability
Data retention voltage: 2V (min.)
Packaged in 28-pin 600 mil DIP, 330 mil SOP
and standard type one TSOP (8 mm
×
13.4
mm)
PIN CONFIGURATIONS
BLOCK DIAGRAM
CLK GEN.
A12
A14
A2
R
O
W
D
E
C
O
D
E
R
PRECHARGE CKT.
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28-pin
DIP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
DD
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
A3
A4
A5
A6
A7
A13
I/O1
I/O8
CORE CELL ARRAY
512 ROWS
64 X 8 COLUMNS
DATA
CNTRL.
CLK
GEN.
I/O CKT.
COLUMN DECODER
WE
CS
OE
A11 A10 A1 A0 A8 A9
PIN DESCRIPTION
OE
A11
A9
A8
A13
WE
V
DD
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
V
SS
I/O3
I/O2
I/O1
A0
A1
A2
28-pin
TSOP
SYMBOL
A0−A14
I/O1−I/O8
CS
WE
OE
V
DD
V
SS
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Output Enable Input
Power Supply
Ground
-1-
Publication Release Date: November 1998
Revision A8
W24258
TRUTH TABLE
CS
H
L
L
L
OE
X
H
L
X
WE
X
H
H
L
MODE
Not Selected
Output Disable
Read
Write
I/O1−I/O8
High Z
High Z
Data Out
Data In
V
DD
CURRENT
I
SB
, I
SB
1
I
DD
I
DD
I
DD
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER
Supply Voltage to V
SS
Potential
Input/Output to V
SS
Potential
Allowable Power Dissipation
Storage Temperature
Operating Temperature
LE
LI
RATING
-0.5 to +7.0
-0.5 to V
DD
+0.5
1.0
-65 to +150
-20 to 85
-40 to 85
UNIT
V
V
W
°C
°C
°C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
Operating Characteristics
(V
DD
= 5V
±10%;
V
DD
= 3V
±10%;
V
SS
= 0V; T
A
(°C) = -20 to 85 for LE; -40 to 85 for LI)
PARAMETER
Input Low Voltage
Input High Voltage
Input Leakage
Current
Output Leakage
Current
SYM.
V
IL
V
IH
I
LI
I
LO
TEST CONDITIONS
-
-
V
IN
= V
SS
to V
DD
V
I/O
= V
SS
to V
DD,
CS = V
IH
(min.) or
OE = V
IH
(min.) or
WE = V
IL
(max.)
I
OL
= +2.1 mA
I
OH
= -1.0 mA
5V
±10%
MIN.
-0.5
+2.2
-1
-1
MAX.
+0.8
V
DD
+0.5
+1
+1
3V
±10%
MIN.
-0.5
+2.0
-1
-1
MAX.
+0.6
V
DD
+0.5
+1
+1
UNIT
V
V
µA
µA
Output Low Voltage
Output High
Voltage
V
OL
V
OH
-
2.4
0.4
-
-
2.2
0.4
-
V
V
-2-
W24258
Operating Characteristics, continued
PARAMETER
SYM.
TEST CONDITIONS
MIN.
5V
±10%
TYP.
3V
±10%
UNIT
MAX. MIN. TYP. MAX.
Operating
Power Supply
Current
Standby
Power Supply
Current
I
DD
CS = V
IL
(max.), I/O = 0 mA,
Cycle = min., Duty = 100%
CS = V
IH
(min.), Cycle =
min., Duty = 100%
CS
≥
V
DD
-0.2V
-
-
70
-
-
30
mA
I
SB
-
-
3
-
-
1
mA
I
SB
1
-
0.7
5
-
0.5
2
µA
Note: Typical parameter is measured under ambient temperature T
A
= 25° C and V
DD
= 5V / 3V.
CAPACITANCE
(V
DD
= 5V, T
A
= 25° C, f = 1 MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYM.
C
IN
C
I/O
CONDITIONS
V
IN
= 0V
V
OUT
= 0V
MAX.
6
8
UNIT
pF
pF
Note: These parameters are sampled but not 100% tested.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Level
Output Load
CONDITIONS
3V
±10%,
0V to 2.4V
5V
±10%,
0V to 3.0V
5 nS
1.5V
See the drawing below
AC Test Loads and Waveform
1 TTL
OUTPUT
100 pF
Including
Jig and
Scope
OUTPUT
5 pF
Including
Jig and
Scope
(For T
CLZ,
T
OLZ,
T
CHZ,
T
OHZ,
T
WHZ,
T
OW
)
2.4V/3.0V
0V
5 nS
90%
10%
90%
10%
5 nS
1 TTL
-3-
Publication Release Date: November 1998
Revision A8
W24258
AC Characteristics, continued
(V
DD
= 5V
±10%;
V
DD
= 3V
±10%;
V
SS
= 0V; T
A
(°C) = -20 to 85 for LE; -40 to 85 for LI)
Read Cycle
PARAMETER
SYM.
MIN.
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Selection to Output in Low Z
Output Enable to Output in Low Z
Chip Deselection to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
∗
These parameters are sampled but not 100% tested
5V
MAX.
-
70
70
35
-
-
30
30
-
MIN.
100
-
-
-
15
5
-
-
15
3V
MAX.
-
100
100
50
-
-
35
35
-
UNIT
T
RC
T
AA
T
ACS
T
AOE
T
CLZ
*
T
OLZ
*
T
CHZ
*
T
OHZ
*
T
OH
70
-
-
-
10
5
-
-
10
nS
nS
nS
nS
nS
nS
nS
nS
nS
Write Cycle
PARAMETER
SYM.
MIN.
Write Cycle Time
Chip Selection to End of Write
Address Valid to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to End of Write
Data Hold from End of Write
Write to Output in High Z
Output Disable to Output in High Z
Output Active from End of Write
∗
These parameters are sampled but not 100% tested
CS, WE
T
WC
T
CW
T
AW
T
AS
T
WP
T
WR
T
DW
T
DH
T
WHZ
*
T
OHZ
*
T
OW
70
50
50
0
50
0
30
0
-
-
5
5V
MAX.
-
-
-
-
-
-
-
-
25
25
-
MIN.
100
70
70
0
70
0
50
0
-
-
10
3V
MAX.
-
-
-
-
-
-
-
-
30
30
-
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
UNIT
-4-
W24258
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
T
RC
Address
T
OH
D
OUT
T
AA
T
OH
Read Cycle 2
(Chip Select Controlled)
CS
T
ACS
T
CLZ
D
OUT
T
CHZ
Read Cycle 3
(Output Enable Controlled)
T
RC
Address
T
AA
OE
T
AOE
T
OLZ
CS
T
ACS
D
OUT
T
CLZ
T
CHZ
T
OHZ
T
OH
-5-
Publication Release Date: November 1998
Revision A8
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