Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
AD565A–SPECIFICATIONS
(T = +25 C, V
A
CC
= +15 V, V
EE
= +15 V, unless otherwise noted.)
Min
AD565AK
Typ
Max
Units
Model
DATA INPUTS (Pins 13 to 24)
TTL or 5 Volt CMOS
Input Voltage
Bit ON Logic “1”
Bit OFF Logic “0”
Logic Current (Each Bit)
Bit ON Logic “1”
Bit OFF Logic “0”
RESOLUTION
OUTPUT
Current
Unipolar (All Bits On)
Bipolar (All Bits On or Off)
Resistance (Exclusive of Span Resistors)
Offset
Unipolar
Bipolar (Figure 3, R2 = 50
Ω
Fixed)
Capacitance
Compliance Voltage
T
MIN
to T
MAX
ACCURACY (Error Relative to
Full Scale) +25°C
T
MIN
to T
MAX
DIFFERENTIAL NONLINEARITY
+25°C
T
MIN
to T
MAX
TEMPERATURE COEFFICIENTS
With Internal Reference
Unipolar Zero
Bipolar Zero
Gain (Full Scale)
Differential Nonlinearity
SETTLING TIME TO 1/2 LSB
All Bits ON-to-OFF or OFF-to-ON
FULL-SCALE TRANSITION
10% to 90% Delay plus Rise Time
90% to 10% Delay plus Fall Time
TEMPERATURE RANGE
Operating
Storage
POWER REQUIREMENTS
V
CC
, +11.4 to +16.5 V de
V
EE
, –11.4 to –16.5 V dc
POWER SUPPLY GAIN SENSITIVITY
2
V
CC
= +11.4 to +16.5 V dc
V
EE
= –11.4 to –16.5 V dc
PROGRAMMABLE OUTPUT RANGES
(See Figures 2, 3, 4)
1
Min
AD565AJ
Typ
Max
+2.0
+120
+35
+5.5
+0.8
+300
+100
12
+2.0
+120
+35
+5.5
+0.8
+300
+100
12
V
V
µA
µA
Bits
–1.6
0.8
6
–2.0
±
1.0
8
0.01
0.05
25
–2.4
1.2
10
0.05
0.15
+10
–1.6
0.8
6
–2.0
±
1.0
8
0.01
0.05
25
–2.4
1.2
10
0.05
0.1
+10
mA
mA
kΩ
% of F.S. Range
% of F.S. Range
pF
V
LSB
% of F.S. Range
LSB
% of F.S. Range
LSB
–1.5
±
1/4
(0.006)
±
1/2
(0.012)
–1.5
±
1/8
(0.003)
±
1/4
(0.006)
1/2
(0.012)
3/4
(0.018)
1/4
(0.006)
1/2
(0.012)
±
1/2
3/4
MONOTONICITY GUARANTEED
±
1/4
1/2
MONOTONICITY GUARANTEED
1
5
15
2
250
15
30
0
–65
3
–12
3
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
±
0.1
±
0.25
±
0.15
15
9.90
1.5
±
0.05
2
10
50
1
5
10
2
250
15
30
0
–65
3
–12
3
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
±
0.1
±
0.25
±
0.15
15
9.90
1.5
±
0.05
2
10
20
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ns
ns
ns
°C
°C
mA
mA
ppm of F.S./%
ppm of F.S./%
V
V
V
V
V
400
30
50
+70
+150
5
–18
10
25
400
30
50
+70
+150
5
–18
10
25
EXTERNAL ADJUSTMENTS
Gain Error with Fixed 50
Ω
Resistor for R2 (Figure 2)
Bipolar Zero Error with Fixed
50
Ω
Resistor for R1 (Figure 3)
Gain Adjustment Range (Figure 2)
Bipolar Zero Adjustment Range
REFERENCE INPUT
Input Impedance
REFERENCE OUTPUT
Voltage
Current (Available for External Loads)
3
POWER DISSIPATION
0.25
0.15
0.25
±
0.1
% of F.S. Range
% of F.S. Range
% of F.S. Range
% of F.S. Range
kΩ
V
mA
mW
20
10.00
2.5
225
25
10.10
345
20
10.00
2.5
225
25
10.10
345
NOTES
1
The digital inputs are guaranteed but not tested over the operating temperature range.
2
The power supply gain sensitivity is tested in reference to a V
CC
, V
EE
of
±
15 V dc.
3
For operation at elevated temperatures the reference cannot supply current for external loads. It, therefore, should be buffered if additional loads are to be supplied.
Specifications subject to change without notice.
–2–
REV. D
AD565A/AD566A
Model
DATA INPUTS (Pins 13 to 24)
TTL or 5 Volt CMOS
Input Voltage
Bit ON Logic “1”
Bit OFF Logic “0”
Logic Current (Each Bit)
Bit ON Logic “1”
Bit OFF Logic “0”
RESOLUTION
OUTPUT
Current
Unipolar (All Bits On)
Bipolar (All Bits On or Off)
Resistance (Exclusive of Span Resistors)
Offset
Unipolar
Bipolar (Figure 3, R2 = 50
Ω
Fixed)
Capacitance
Compliance Voltage
T
MIN
to T
MAX
ACCURACY (Error Relative to
Full Scale) +25°C
T
MIN
to T
MAX
DIFFERENTIAL NONLINEARITY
+25°C
T
MIN
to T
MAX
TEMPERATURE COEFFICIENTS
With Internal Reference
Unipolar Zero
Bipolar Zero
Gain (Full Scale)
Differential Nonlinearity
SETTLING TIME TO 1/2 LSB
All Bits ON-to-OFF or OFF-to-ON
FULL-SCALE TRANSITION
10% to 90% Delay plus Rise Time
90% to 10% Delay plus Fall Time
TEMPERATURE RANGE
Operating
Storage
POWER REQUIREMENTS
V
CC
, +11.4 to +16.5 V dc
V
EE
, –11.4 to –16.5 V dc
POWER SUPPLY GAIN SENSITIVITY
2
V
CC
= +11.4 to +16.5 V dc
V
EE
= –11.4 to –16.5 V dc
PROGRAMMABLE OUTPUT RANGES
(See Figures 2, 3, 4)
1
Min
AD565AS
Typ
Max
Min
AD565AT
Typ
Max
Units
+2.0
+120
+35
+5.5
+0.8
+300
+100
12
+2.0
+120
+35
+5.5
+0.8
+300
+100
12
V
V
µA
µA
Bits
–1.6
0.8
6
–2.0
±
1.0
8
0.01
0.05
25
–2.4
1.2
10
0.05
0.15
+10
–1.6
0.8
6
–2.0
±
1.0
8
0.01
0.05
25
–2.4
1.2
10
0.05
0.1
+10
mA
mA
kΩ
% of F.S. Range
% of F.S. Range
pF
V
LSB
% of F.S. Range
LSB
% of F.S. Range
LSB
–1.5
±
1/4
(0.006)
±
1/2
(0.012)
–1.5
±
1/8
(0.003)
±
1/4
(0.006)
1/2
(0.012)
3/4
(0.018)
1/4
(0.006)
1/2
(0.012)
±
1/2
3/4
MONOTONICITY GUARANTEED
±
1/4
1/2
MONOTONICITY GUARANTEED
1
5
15
2
250
15
30
–55
–65
3
–12
3
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
±
0.1
±
0.25
±
0.15
15
9.90
1.5
±
0.05
2
10
30
1
5
10
2
250
15
30
–55
–65
3
–12
3
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
±
0.1
±
0.25
±
0.15
15
9.90
1.5
±
0.05
2
10
15
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ns
ns
ns
°C
°C
mA
mA
ppm of F.S./%
ppm of F.S./%
V
V
V
V
V
400
30
50
+125
+150
5
–18
10
25
400
30
50
+125
+150
5
–18
10
25
EXTERNAL ADJUSTMENTS
Gain Error with Fixed 50
Ω
Resistor for R2 (Figure 2)
Bipolar Zero Error with Fixed
50
Ω
Resistor for R1 (Figure 3)
Gain Adjustment Range (Figure 2)
Bipolar Zero Adjustment Range
REFERENCE INPUT
Input Impedance
REFERENCE OUTPUT
Voltage
Current (Available for External Loads)
3
POWER DISSIPATION
0.25
0.15
0.25
0.1
% of F.S. Range
% of F.S. Range
% of F.S. Range
% of F.S. Range
kΩ
V
mA
mW
20
10.00
2.5
225
25
10.10
345
20
10.00
2.5
225
25
10.10
345
Specifications shown in
boldface
are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in
boldface
are tested on all production units.
Specification subject to change without notice.
REV. D
–3–
AD566A–SPECIFICATIONS
(T = +25 C, V
A
EE
= –15 V, unless otherwise noted)
AD566AK
Max
Min
Typ
Max
Units
AD566AJ
Model
DATA INPUTS (Pins 13 to 24)
TTL or 5 Volt CMOS
Input Voltage
Bit ON Logic “1”
Bit OFF Logic “0”
Logic Current (Each Bit)
Bit ON Logic “1”
Bit OFF Logic “0”
RESOLUTION
OUTPUT
Current
Unipolar (All Bits On)
Bipolar (All Bits On or Off)
Resistance (Exclusive of Span Resistors)
Offset
Unipolar (Adjustable to Zero per Figure 3)
Bipolar (Figure 4, R1 and R2 = 50
Ω
Fixed)
Capacitance
Compliance Voltage
T
MIN
to T
MAX
ACCURACY (Error Relative to
Full Scale) +25°C
T
MIN
to T
MAX
DIFFERENTIAL NONLINEARITY
+25°C
T
MIN
to T
MAX
TEMPERATURE COEFFICIENTS
Unipolar Zero
Bipolar Zero
Gain (Full Scale)
Differential Nonlinearity
SETTLING TIME TO 1/2 LSB
All Bits ON-to-OFF or OFF-to-ON (Figure 8)
FULL-SCALE TRANSITION
10% to 90% Delay plus Rise Time
90% to 10% Delay plus Fall Time
POWER REQUIREMENTS
V
EE
, –11.4 to –16.5 V dc
POWER SUPPLY GAIN SENSITIVITY
2
V
EE
= –11.4 to –16.5 V dc
PROGRAMMABLE OUTPUT RANGES
(see Figures 3, 4, 5)
1
Min
Typ
+2.0
0
+120
+35
+5.5
+0.8
+300
+100
12
+2.0
0
+120
+35
+5.5
+0.8
+300
+100
12
V
V
µA
µA
Bits
–1.6
0.8
6
–2.0
±
1.0
8
0.01
0.05
25
–2.4
1.2
10
0.05
0.15
+10
–1.6
0.8
6
–2.0
±
1.0
8
0.01
0.05
25
–2.4
1.2
10
0.05
0.1
+10
mA
mA
kΩ
% of F.S. Range
% of F.S. Range
pF
V
LSB
% of F.S. Range
LSB
% of F.S. Range
LSB
–1.5
±
1/4
(0.006)
±
1/2
(0.012)
–1.5
±
1/8
(0.003)
±
1/4
(0.006)
1/2
(0.012)
3/4
(0.018)
1/4
(0.006)
1/2
(0.012)
±
1/2
3/4
MONOTONICITY GUARANTEED
1
5
7
2
250
15
30
–12
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
±
0.1
±
0.25
±
0.15
15
±
0.05
2
10
10
±
1/4
1/2
MONOTONICITY GUARANTEED
1
5
3
2
250
15
30
–12
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
±
0.1
±
0.25
±
0.15
15
±
0.05
2
10
5
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ns
ns
ns
mA
ppm of F.S./%
V
V
V
V
V
350
30
50
–18
25
350
30
50
–18
25
EXTERNAL ADJUSTMENTS
Gain Error with Fixed 50
Ω
Resistor for R2 (Figure 3)
Bipolar Zero Error with Fixed
50
Ω
Resistor for R1 (Figure 4)
Gain Adjustment Range (Figure 3)
Bipolar Zero Adjustment Range
REFERENCE INPUT
Input Impedance
POWER DISSIPATION
MULTIPLYING MODE PERFORMANCE (All Models)
Quadrants
Reference Voltage
Accuracy
Reference Feedthrough (Unipolar Mode,
All Bits OFF, and 1 V to +10 V [p-p], Sine Wave
Frequency for 1/2 LSB [p-p] Feedthrough)
Output Slew Rate 10%–90%
90%–10%
Output Settling Time (All Bits ON and a 0 V–10 V
Step Change in Reference Voltage)
CONTROL AMPLIFIER
Full Power Bandwidth
Small-Signal Closed-Loop Bandwidth
0.25
0.15
0.25
0.1
% of F.S. Range
% of F.S. Range
% of F.S. Range
% of F.S. Range
kΩ
mW
20
180
25
300
20
180
25
300
Two (2): Bipolar Operation at Digital Input Only
+1 V to +10 V, Unipolar
10 Bits (± 0.05% of Reduced F.S.) for 1 V dc Reference Voltage
40 kHz typ
5 mA/µs
1 mA/µs
1.5
µs
to 0.01% F.S.
300 kHz
1.8 MHz
NOTES
1
The digital input levels are guaranteed but not tested over the temperature range.
2
The power supply gain sensitivity is tested in reference to a V
EE
of –1.5 V dc.
Specifications subject to change without notice.
–4–
REV. D
AD565A/AD566A
AD566AS
Model
DATA INPUTS
1
(Pins 13 to 24)
TTL or 5 Volt CMOS
Input Voltage
Bit ON Logic “1”
Bit OFF Logic “0”
Logic Current (Each Bit)
Bit ON Logic “1”
Bit OFF Logic “0”
RESOLUTION
OUTPUT
Current
Unipolar (All Bits On)
Bipolar (All Bits On or Off)
Resistance (Exclusive of Span Resistors)
Offset
Unipolar (Adjustable to Zero per Figure 3)
Bipolar (Figure 4, R1 and R2 = 50
Ω
Fixed)
Capacitance
Compliance Voltage
T
MIN
to T
MAX
ACCURACY (Error Relative to
Full Scale) +25°C
T
MIN
to T
MAX
DIFFERENTIAL NONLINEARITY
+25°C
T
MIN
to T
MAX
TEMPERATURE COEFFICIENTS
Unipolar Zero
Bipolar Zero
Gain (Full Scale)
Differential Nonlinearity
SETTLING TIME TO 1/2 LSB
All Bits ON-to-OFF or OFF-to-ON (Figure 8)
FULL-SCALE TRANSITION
10% to 90% Delay plus Rise Time
90% to 10% Delay plus Fall Time
POWER REQUIREMENTS
V
EE
, –11.4 to –16.5 V dc
POWER SUPPLY GAIN SENSITIVITY
2
V
EE
= –11.4 to –16.5 V dc
PROGRAMMABLE OUTPUT RANGES
(see Figures 3, 4, 5)
Min
Typ
Max
Min
AD566AT
Typ
Max
Units
+2.0
0
+120
+35
+5.5
+0.8
+300
+100
12
+2.0
0
+120
+35
+5.5
+0.8
+300
+100
12
V
V
µA
µA
Bits
–1.6
0.8
6
–2.0
±
1.0
8
0.01
0.05
25
–2.4
1.2
10
0.05
0.15
+10
–1.6
0.8
6
–2.0
±
1.0
8
0.01
0.05
25
–2.4
1.2
10
0.05
0.1
+10
mA
mA
kΩ
% of F.S. Range
% of F.S. Range
pF
V
LSB
% of F.S. Range
LSB
% of F.S. Range
LSB
–1.5
±
1/4
(0.006)
±
1/2
(0.012)
–1.5
±
1/8
(0.003)
±
1/4
(0.006)
1/2
(0.012)
3/4
(0.018)
1/4
(0.006)
1/2
(0.012)
±
1/2
3/4
MONOTONICITY GUARANTEED
1
5
7
2
250
15
30
–12
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
±
0.1
±
0.25
±
0.15
15
±
0.05
2
10
10
±
1/4
1/2
MONOTONICITY GUARANTEED
1
5
3
2
250
15
30
–12
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
±
0.1
±
0.25
±
0.15
15
±
0.05
2
10
5
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ns
ns
ns
mA
ppm of F.S./%
V
V
V
V
V
350
30
50
–18
25
350
30
50
–18
25
EXTERNAL ADJUSTMENTS
Gain Error with Fixed 50
Ω
Resistor for R2 (Figure 3)
Bipolar Zero Error with Fixed
50
Ω
Resistor for R1 (Figure 4)
Gain Adjustment Range (Figure 3)
Bipolar Zero Adjustment Range
REFERENCE INPUT
Input Impedance
POWER DISSIPATION
MULTIPLYING MODE PERFORMANCE (All Models)
Quadrants
Reference Voltage
Accuracy
Reference Feedthrough (Unipolar Mode,
All Bits OFF, and 1 V to +10 V [p-p], Sine Wave
Frequency for l/2 LSB [p-p] Feedthrough)
Output Slew Rate 10%–90%
90%–10%
Output Settling Time (All Bits ON and a 0 V–10 V
Step Change in Reference Voltage)
CONTROL AMPLIFIER
Full Power Bandwidth
Small-Signal Closed-Loop Bandwidth
0.25
0.15
0.25
0.1
% of F.S. Range
% of F.S. Range
% of F.S. Range
% of F.S. Range
kΩ
mW
20
180
25
300
20
180
25
300
Two (2): Bipolar Operation at Digital Input Only
+1 V to +10 V, Unipolar
10 Bits (± 0.05% of Reduced F.S.) for 1 V dc Reference Voltage
40 kHz typ
5 mA/µs
1 mA/µs
1.5
µs
to 0.01% F.S.
300 kHz
1.8 MHz
NOTES
Specifications shown in
boldface
are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max
specifications are guaranteed, although only those shown in
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