Acoustic noise-less 3.7kW/AC200V class 3 phase inverter and other motor control applica-
tions.
PACKAGE OUTLINES
4-R2
56
±
0.8
15.5
4-φ4.5
MOUNTING
HOLE
20.4
±
1
Terminals Assignment:
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
CBU+
CBU–
CBV+
CBV–
CBW+
CBW–
GND
NC
VDH
CL
FO1
FO2
FO3
CU
CV
CW
UP
VP
WP
UN
VN
WN
Br
31
32
33
34
35
36
P
Br
N
U
V
W
10
2
±
0.3
5
0.5
1
7
23
0.5
4-R5
5
4-
φ
6
±
0.3
(22)
41
±
0.5
15.5
60
±
0.5
1
±
0.3
(102)
15.5
3
31
5
1
36
10
12.7
±
0.3
63.5
±
0.8
105
±
0.5
115
±
1
96
2.5
17.5
63
±
0.8
76
±
1
50
32
5
4-φ3.2
3
17
±
0.8
LABEL
(Fig. 1)
May 2001
8.5
13
MITSUBISHI SEMICONDUCTOR <Application Specific Intelligent Power Module>
PS11017
FLAT-BASE TYPE
INSULATED TYPE
INTERNAL FUNCTIONS BLOCK DIAGRAM
Application Specific Intelligent
Power Module
Protection
Circuit
Level shifter
Drive Circuit
P
Brake resistor connection,
Inrush prevention circuit,
etc.
AC 200V line input
B
R
S
T
Z
C
CBW+
CBW–
CBU+
CBU–
CBV+
CBV–
U
V
W
M
AC 200V line
output
N
Z : Surge absorber.
C : AC filter (Ceramic condenser 2.2~6.5nF)
[Note : Additionally an appropriate Line-to line
surge absorber circuit may become necessary
depending on the application environment].
T
S
Current sensing
circuit
Input signal conditioning
CU CV CW
U
P
V
P
W
P
U
N
V
N
W
N
B
r
Drive Circuit
Fo Logic
Protection
circuit
Control supply
fault sense
GND VDH
CL, FO
1
, FO
2
, FO
3
Analogue signal output corresponding to
PWM input
each phase current (5V line) Note 1)
(5V line) Note 2)
Fault output
(5V line) Note 3)
Note 1) To prevent chances of signal oscillation, a series resistor (1kΩ) coupling at each output is recommended.
Note 2) By virtue of integrating an photo-coupler inside the module, direct coupling to CPU, without any external opto or transformer isolation is possible.
Note 3) All outputs are open collector type. Each signal line should be pulled up to plus side of the 5V power supply with approximately 5.1kΩ resistance.
Note 4) The wiring between power DC link capacitor and P/N terminals should be as short as possible to protect the ASIPM against catastrophic high surge voltage.
For extra precaution, a small film snubber capacitor (0.1~0.22µF, high voltage type) is recommended to be mounted close to these P and N DC power input pins.
(Fig. 2)
MAXIMUM RATINGS
(Tj = 25°C)
INVERTER PART (Including Brake Part)
Supply voltage
V
CC(surge)
Supply voltage (surge)
V
P
or V
N
V
P(S)
or V
N(S)
±I
C
(±I
CP
)
I
C
(I
CP
)
I
F
(I
FP
)
Symbol
V
CC
Item
Condition
Applied between P-N
Ratings
450
500
600
600
±50
(±100)
15 (30)
15 (30)
Unit
V
V
V
V
A
A
A
Applied between P-N, Surge-value
Applied between P-U, V, W, Br or U, V, W,
Each output IGBT collector-emitter static voltage
Br-N
Each output IGBT collector-emitter
Applied between P-U, V, W, Br or U, V, W,
switching surge voltage
Br-N
Each output IGBT collector current
T
C
= 25°C
Brake IGBT collector current
Brake diode anode current
Note: “( )” means I
C
peak value
CONTROL PART
Symbol
V
DH
, V
DB
V
CIN
V
FO
I
FO
V
CL
I
CL
I
CO
Supply voltage
Input signal voltage
Fault output supply voltage
Fault output current
Current-limit warning (CL) output voltage
CL output current
Analogue current signal output current
Item
Condition
Applied between V
DH
-GND, C
BU+
-C
BU–
,
C
BV+
-C
BV–
, C
BW+
-C
BW–
Applied between U
P
· V
P
· W
P
· U
N
· V
N
·
W
N
· Br-GND
Applied between F
O1
· F
O2
· F
O3
-GND
Sink current of F
O1
· F
O2
· F
O3
Applied between CL-GND
Sink current of CL
Sink current of CU · CV · CW
Ratings
20
–0.5 ~ 7.5
–0.5 ~ 7
15
–0.5 ~ 7
15
±1
Unit
V
V
V
mA
V
mA
mA
May 2001
MITSUBISHI SEMICONDUCTOR <Application Specific Intelligent Power Module>
PS11017
FLAT-BASE TYPE
INSULATED TYPE
TOTAL SYSTEM
Symbol
T
j
T
stg
T
C
V
iso
Item
Junction temperature
Storage temperature
Module case operating temperature
Isolation voltage
Mounting torque
Condition
(Note 2)
—
(Fig. 3)
60 Hz sinusoidal AC applied between all terminals and
the base plate for 1 minute.
Mounting screw: M4.0
Ratings
–20 ~ +125
–40 ~ +125
–20 ~ +100
2500
0.98 ~ 1.47
Unit
°C
°C
°C
Vrms
N·m
Note 2) The item defines the maximum junction temperature for the power elements (IGBT/Diode) of the ASIPM to ensure safe operation. How-
ever, these power elements can endure instantaneous junction temperature as high as 150°C instantaneously . To make use of this ad-
ditional temperature allowance, a detailed study of the exact application conditions is required and, accordingly, necessary information
is requested to be provided before use.
CASE TEMPERATURE MEASUREMENT POINT (3mm from the base surface)
LABEL
Tc
(Fig. 3)
THERMAL RESISTANCE
Symbol
Rth(j-c)
Q
Rth(j-c)
F
Rth(j-c)
Q
Rth(j-c)
F
Rth(c-f)
Item
Inverter IGBT (1/6)
Inverter FWDi (1/6)
Brake IGBT
Brake FWDi
Case to fin, thermal grease applied
Condition
Min.
—
—
—
—
—
Ratings
Typ.
—
—
—
—
—
Max.
1.75
2.4
2.9
4.5
0.031
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
Junction to case Thermal
Resistance
Contact Thermal Resistance
ELECTRICAL CHARACTERISTICS
(Tj = 25°C, V
DH
= 15V, V
DB
= 15V unless otherwise noted)
Symbol
V
CE(sat)
V
EC
V
CE(sat)Br
V
FBr
ton
tc(on)
toff
tc(off)
trr
Item
Collector-emitter saturation voltage
FWDi forward voltage
Brake IGBT
Collector-emitter saturation voltage
Brake diode forward voltage
Condition
V
DH
= V
DB
= 15V, Input = ON, Tj = 25°C, Ic = 50A
Tj = 25°C, Ic = –50A, Input = OFF
V
DH
= 15V, Input = ON, Tj = 25°C, Ic = 15A
Tj = 25°C, I
F
= 15A, Input = OFF
1/2 Bridge inductive, Input = ON
V
CC
= 300V, Ic = 50A, Tj = 125°C
V
DH
= 15V, V
DB
= 15V
Note : ton, toff include delay time of the internal control
circuit
V
CC
≤
400V, Input = ON (one-shot)
Tj = 125°C start
13.5V
≤
V
DH
= V
DB
≤
16.5V
V
CC
≤
400V, Tj
≤
125°C,
Switching SOA
I
DH
V
th(on)
V
th(off)
R
i
Circuit current
Input on threshold voltage
Input off threshold voltage
Input pull-up resister
Integrated between input terminal-V
DH
Ic < I
OL
(CL) operation level, Input = ON,
13.5V
≤
V
DH
= V
DB
≤
16.5V
V
DH
= 15V, V
CIN
= 5V
Min.
—
—
—
—
0.40
—
—
—
—
Ratings
Typ.
—
—
—
—
0.8
0.40
1.5
0.6
0.15
Max.
2.9
2.9
3.5
2.9
2.0
1.0
2.4
1.3
—
Unit
V
V
V
V
µs
µs
µs
µs
µs
Switching times
FWD reverse recovery time
Short circuit endurance
(Output, Arm, and Load,
Short Circuit Modes)
• No destruction
• F
O
output by protection operation
• No destruction
• No protecting operation
• No F
O
output
—
0.8
2.5
—
—
1.4
3.0
150
150
2.0
4.0
—
mA
V
V
kΩ
May 2001
MITSUBISHI SEMICONDUCTOR <Application Specific Intelligent Power Module>
PS11017
FLAT-BASE TYPE
INSULATED TYPE
ELECTRICAL CHARACTERISTICS
(Tj = 25°C, V
DH
= 15V, V
DB
= 15V unless otherwise noted)
Symbol
f
PWM
t
xx
t
dead
t
int
V
CO
Item
PWM input frequency
Allowable input on-pulse width
Allowable input signal dead time for
blocking arm shoot-through
Input inter-lock sensing
Condition
T
C
≤
100°C, Tj
≤
125°C
(Note 3)
V
DH
= 15V, T
C
= –20°C ~ +100°C
Relates to corresponding inputs,
(Except brake part), T
C
= –20°C ~ +100°C
Relates to corresponding input (Except break part)
Ic = 0A
Ic = I
OP
(200%)
Ic = –I
OP
(200%)
V
DH
= 15V
T
C
= –20°C ~ 100°C
(Fig. 4)
Min.
—
1
2.5
—
1.87
0.77
2.97
—
—
(Fig. 4)
|V
CO
-V
C±
(200%)|
Correspond to max. 500µs data hold period
(Fig. 5)
only, Ic = I
OP
(200%)
After input signal trigger point
Open collector output
V
D
= 15V, T
C
= –20°C ~ 100°C
Tj = 25°C
V
DH
= 15V
(Note 4)
(Fig. 8)
4.0
—
–5
—
—
—
48.2
79.2
100
—
11.05
11.55
T
C
= –20 ~ +100°C,
Tj
≤
125°C
18.00
16.50
10.0
10.5
—
—
—
Ratings
Typ.
—
—
—
65
2.27
1.17
3.37
15
—
—
1.1
—
3
—
1
60.0
102
110
90
12.00
12.50
19.20
17.50
11.0
11.5
10
—
1
Max.
15
500
—
100
2.57
1.47
3.67
—
0.7
—
—
5
—
1
—
72.0
—
120
—
12.75
13.25
20.15
18.65
12.0
12.5
—
1
—
Unit
kHz
µs
µs
ns
V
V
V
mV
V
V
V
%
µs
µA
mA
A
A
°C
°C
V
V
V
V
V
V
µs
µA
mA
V
C+
(200%) Analogue signal linearity with output current
V
C–
(200%)
Offset change area vs temperature
|∆V
CO
|
V
C+
V
C–
Analogue signal output voltage limit
∆V
C
(200%) Analogue signal over all linear variation
r
CH
t
d(read)
I
CL(H)
I
CL(L)
±I
OL
SC
OT
OTr
UV
DH
UV
DHr
OV
DH
OV
DHr
UV
DB
UV
DBr
t
dV
I
FO(H)
I
FO(L)
Analogue signal data hold accuracy
Analogue signal reading time
Signal output current of
CL operation
Idle
Active
V
DH
= 15V, T
C
= –20°C ~ 100°C
Ic > I
OP
(200%), V
DH
= 15V
CL warning operation level
Short circuit over current trip level
Trip level
Over temperature
protection
Reset level
Trip level
Reset level
Trip level
Supply circuit under &
over voltage protection
Reset level
Trip level
Reset level
Filter time
Fault output current
Idle
Active
(Fig. 7) (Note 5)
Open collector output
(Note 3) : (a) Allowable minimum input on-pulse width : This item applies to P-side circuit only.
(b) Allowable maximum input on-pulse width : This item applies to both P-side and N-side circuits excluding the brake circuit.
(Note4) : CL output : The "current limit warning (CL) operation circuit outputs warning signal whenever the arm current exceeds this limit. The
circuit is reset automatically by the next input signal and thus, it operates on a pulse-by-pulse scheme.
(Note5) : The short circuit protection works instantaneously when a high short circuit current flows through an internal IGBT rising up momen-
tarily. The protection function is, thus meant primarily to protect the ASIPM against short circuit distraction. Therefore, this function is
not recommended to be used for any system load current regulation or any over load control as this might, cause a failure due to
excessive temperature rise. Instead, the analogue current output feature or the over load warning feature (CL) should be appropri-
ately used for such current regulation or over load control operation. In other words, the PWM signals to the ASIPM should be shut
down, in principle, and not to be restarted before the junction temperature would recover to normal, as soon as a fault is feed back
from its F
O1
pin of the ASIPM indicating a short circuit situation.
RECOMMENDED CONDITIONS
Symbol
V
CC
V
DH
, V
DB
Item
Supply voltage
Control Supply voltage
Condition
Applied across P-N terminals
Applied between V
DH
-GND, C
BU+
-C
BU–
, C
BV+
-C
BV–
,
C
BW+
-C
BW–
Ratings
400 (max.)
15±1.5
±1
(max.)
0 ~ 0.3
4.8 ~ 5.0
Using application circuit
Using application circuit
2 ~ 15
2.5 (min.)
Unit
V
V
V/µs
V
V
kHz
µs
∆V
DH
,
∆V
DB
Supply voltage ripple
Input on voltage
V
CIN(on)
V
CIN(off)
f
PWM
t
dead
Input off voltage
PWM Input frequency
Arm shoot-through blocking time
May 2001
MITSUBISHI SEMICONDUCTOR <Application Specific Intelligent Power Module>
PS11017
FLAT-BASE TYPE
INSULATED TYPE
Fig. 4 OUTPUT CURRENT ANALOGUE SIG-
NALING LINEARITY
5
V
C
–
4
min
max
V
C
–
(200%)
V
DH
=15V
T
C
=
–
20
~
100˚C
Fig. 5 OUTPUT CURRENT ANALOGUE SIGNALING
“DATA HOLD” DEFINITION
V
C
500µs
0V
3
V
C0
V
CH
(5
µ
s)
V
CH
(505
µ
s)-V
CH
(5
µ
s)
V
CH
(5
µ
s)
V
CH
(505
µ
s)
V
C
(V)
2
V
C
+(200%)
r
CH
=
1
Analogue output signal
data hold range
V
C
+
0
–400 –300
–200
–100
Note ; Ringing happens around the point where the signal output
voltage changes state from “analogue” to “data hold” due
to test circuit arrangement and instrumentational trouble.
Therefore, the rate of change is measured at a 5
µs
delayed point.
0
100
200
300 400
Real load current peak value.(%)(I
c
=I
o
!
2)
(Fig. 4)
Fig. 6 INPUT INTERLOCK OPERATION TIMING CHART
Input signal V
CIN(p)
of each phase upper arm
Input signal V
CIN(n)
of each phase lower arm
0V
Gate signal V
o(p)
of each phase upper arm
(ASIPM internal)
Gate signal V
o(n)
of each phase upper arm
(ASIPM internal)
Error output F
O1
0V
0V
0V
0V
Note : Input interlock protection circuit ; It is operated when the input signals for any upper-arm / lower-arm pair of a phase are simulta-
neously in “LOW” level.
By this interlocking, both upper and lower IGBTs of this mal-triggered phase are cut off, and “F
O
” signal is outputted. After an “input
interlock” operation the circuit is latched. The “F
O
” is reset by the high-to-low going edge of either an upper-leg, or a lower-leg input,
whichever comes in later.
Fig. 7 TIMING CHART AND SHORT CIRCUIT PROTECTION OPERATION
Input signal V
CIN
of each phase
upper arm
Short circuit sensing signal V
S
0V
0V
S
C
delay time
Gate signal Vo of each phase
upper arm(ASIPM internal)
Error output F
O1
0V
0V
Note : Short circuit protection operation. The protection operates with “F
O
” flag and reset on a pulse-by-pulse scheme. The protection by
gate shutdown is given only to the IGBT that senses an overload (excluding the IGBT for the “Brake”).
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51mcu
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