2N5196/5197/5198/5199
Vishay Siliconix
Monolithic N-Channel JFET Duals
PRODUCT SUMMARY
Part Number
2N5196
2N5197
2N5198
2N5199
V
GS(off)
(V)
–0.7 to –4
–0.7 to –4
–0.7 to –4
–0.7 to –4
V
(BR)GSS
Min (V)
–50
–50
–50
–50
g
fs
Min (mS)
1
1
1
1
I
G
Max (pA)
–15
–15
–15
–15
jV
GS1
– V
GS2
j
Max (mV)
5
5
10
15
FEATURES
D
D
D
D
D
D
Monolithic Design
High Slew Rate
Low Offset/Drift Voltage
Low Gate Leakage: 5 pA
Low Noise
High CMRR: 100 dB
BENEFITS
D
Tight Differential Match vs. Current
D
Improved Op Amp Speed, Settling Time
Accuracy
D
Minimum Input Error/Trimming Requirement
D
Insignificant Signal Loss/Error Voltage
D
High System Sensitivity
D
Minimum Error with Large Input Signal
APPLICATIONS
D
Wideband Differential Amps
D
High-Speed, Temp-Compensated,
Single-Ended Input Amps
D
High Speed Comparators
D
Impedance Converters
DESCRIPTION
The 2N5196/5197/5198/5199 JFET duals are designed for
high-performance differential amplification for a wide range of
precision test instrumentation applications. This series
features tightly matched specs, low gate leakage for accuracy,
and wide dynamic range with I
G
guaranteed at V
DG
= 20 V.
The hermetically-sealed TO-71 package is available with full
military processing (see Military Information and the
2N5545/5546/5547JANTX/JANTXV data sheet).
For similar products see the low-noise U/SST401 series, the
high-gain 2N5911/5912, and the low-leakage U421/423 data
sheets.
TO-71
S
1
1
D
1
6
G
2
2
5
D
2
3
G
1
Top View
4
S
2
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Lead Temperature (
1
/
16
” from case for 10 sec.) . . . . . . . . . . . . . . . . . . 300
_C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 200_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . –55 to 150_C
Document Number: 70252
S-04031—Rev. D, 04-Jun-01
Power Dissipation :
Per Side
a
. . . . . . . . . . . . . . . . . . . . . . . . 250 mW
Total
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
Notes
a. Derate 2 mW/_C above 85_C
b. Derate 4 mW/_C above 85_C
www.vishay.com
8-1
2N5196/5197/5198/5199
Vishay Siliconix
SPECIFICATIONS FOR 2N5196 AND 2N5197 (T
A
= 25_C UNLESS OTHERWISE NOTED)
Limits
2N5196
2N5197
Parameter
Static
Gate-Source Breakdown Voltage
Gate-Source Cutoff Voltage
Saturation Drain Current
b
Gate Reverse Current
Symbol
Test Conditions
I
G
= –1
mA,
V
DS
= 0 V
V
DS
= 20 V, I
D
= 1 nA
V
DS
= 20 V, V
GS
= 0 V
V
GS
= –30 V, V
DS
= 0 V
T
A
= 150_C
V
DG
= 20 V, I
D
= 200
mA
T
A
= 125_C
V
DG
= 20 V, I
D
= 200
mA
Typ
a
Min
Max
Min
Max
Unit
V
(BR)GSS
V
GS(off)
I
DSS
I
GSS
I
G
V
GS
–57
–2
3
–10
–20
–5
–0.8
–50
–0.7
0.7
–4
–50
–0.7
0.7
–4
V
mA
pA
nA
pA
nA
V
7
–25
–50
–15
–15
7
–25
–50
–15
–15
Gate Operating Current
Gate-Source Voltage
–1.5
–0.2
–3.8
–0.2
–3.8
Dynamic
Common-Source
Forward Transconductance
Common-Source
Output Conductance
Common-Source
Forward Transconductance
Common-Source
Output Conductance
Common-Source
Input Capacitance
Common-Source
Reverse Transfer Capacitance
Equivalent Input Noise Voltage
Noise Figure
g
fs
g
os
g
fs
g
os
C
iss
C
rss
e
n
NF
2.5
V
DS
= 20 V, V
GS
= 0 V
f = 1 kHz
2
0.8
1
3
V
DS
= 20 V, V
GS
= 0 V
f = 1 MHz
1
9
0.7
1
4
50
1.6
4
6
2
20
0.5
0.7
1
4
50
1.6
4
6
pF
2
20
0.5
nV⁄
√Hz
dB
mS
mS
mS
mS
V
DS
= 20 V, I
D
= 200
mA
f = 1 kHz
V
DS
= 20 V, V
GS
= 0 V, f = 1 kHz
V
DS
= 20 V, V
GS
= 0 V
f = 100 Hz, R
G
= 10 MW
Matching
Differential Gate-Source Voltage
Gate-Source Voltage Differential
Change with Temperature
|V
GS1
–V
GS2
|
D
|V
GS1
–V
GS2
|
DT
I
DSS1
I
DSS2
g
fs1
g
fs2
|g
os1
–g
os2
|
|I
G1
–I
G2
|
CMRR
V
DG
= 20 V, I
D
= 200
mA
, T
A
= 125_C
V
DG
= 10 to 20 V, I
D
= 200
mA
V
DG
= 20 V, I
D
= 200
mA
V
DG
= 20 V, I
D
= 200
mA
T
A
= –55 to 125_C
V
DS
= 20 V, V
GS
= 0 V
0.98
0.95
5
5
5
10
mV
mV/_C
Saturation Drain Current Ratio
1
0.95
1
Transconductance Ratio
0.99
V
DS
= 20 V, I
D
= 200
mA
f = 1 kHz
0.1
0.97
1
0.97
1
mS
Differential Output Conductance
1
1
Differential Gate Current
Common Mode Rejection Ratio
c
0.1
100
5
5
nA
dB
www.vishay.com
8-2
Document Number: 70252
S-04031—Rev. D, 04-Jun-01
2N5196/5197/5198/5199
Vishay Siliconix
SPECIFICATIONS FOR 2N5198 AND 2N5199 (T
A
= 25_C UNLESS OTHERWISE NOTED)
Limits
2N5198
2N5199
Parameter
Static
Gate-Source Breakdown Voltage
Gate-Source Cutoff Voltage
Saturation Drain Current
b
Gate Reverse Current
Symbol
Test Conditions
I
G
= –1
mA,
V
DS
= 0 V
V
DS
= 20 V, I
D
= 1 nA
V
DS
= 20 V, V
GS
= 0 V
V
GS
= –30 V, V
DS
= 0 V
T
A
= 150_C
V
DG
= 20 V, I
D
= 200
mA
T
A
=125_C
V
DG
= 20 V, I
D
= 200
mA
Typ
a
Min
Max
Min
Max
Unit
V
(BR)GSS
V
GS(off)
I
DSS
I
GSS
I
G
V
GS
–57
–2
3
–10
–20
–5
–0.8
–50
–0.7
0.7
–4
–50
–0.7
0.7
–4
V
mA
pA
nA
pA
nA
V
7
–25
–50
–15
–15
7
–25
–50
–15
–15
Gate Operating Current
Gate-Source Voltage
–1.5
–0.2
–3.8
–0.2
–3.8
Dynamic
Common-Source
Forward Transconductance
Common-Source
Output Conductance
Common-Source
Forward Transconductance
Common-Source
Output Conductance
Common-Source Input Capacitance
Common-Source
Reverse Transfer Capacitance
Equivalent Input Noise Voltage
Noise Figure
g
fs
V
DS
= 20 V, V
GS
= 0 V, f = 1 kHz
g
os
g
fs
g
os
C
iss
C
rss
e
n
NF
V
DS
= 20 V, V
GS
= 0 V, f = 1 MHz
2
0.8
1
3
1
9
0.7
50
1.6
4
6
2
20
0.5
0.7
50
1.6
4
6
2
20
0.5
pF
nV⁄
√Hz
dB
2.5
1
4
1
4
mS
mS
mS
mS
V
DS
= 20 V, I
D
= 200
mA
f = 1 kHz
V
DS
= 20 V, V
GS
= 0 V, f = 1 kHz
V
DS
= 20 V, V
GS
= 0 V
f = 100 Hz, R
G
= 10 MW
Matching
Differential Gate-Source Voltage
Gate-Source Voltage Differential
Change with Temperature
|V
GS1
–V
GS2
|
D
|V
GS1
–V
GS2
|
DT
I
DSS1
I
DSS2
g
fs1
g
fs2
|g
os1
–g
os2
|
|I
G1
–I
G2
|
CMRR
V
DG
= 20 V, I
D
= 200
mA
, T
A
= 125_C
V
DG
= 10 to 20 V, I
D
= 200
mA
V
DG
= 20 V, I
D
= 200
mA
V
DG
= 20 V, I
D
= 200
mA
T
A
= –55 to 125_C
V
DS
= 20 V, V
GS
= 0 V
0.97
0.95
10
20
15
40
mV
mV/_C
Saturation Drain Current Ratio
1
0.95
1
Transconductance Ratio
0.97
V
DS
= 20 V, I
D
= 200
mA
f = 1 kHz
0.2
0.95
1
0.95
1
mS
Differential Output Conductance
1
1
Differential Gate Current
Common Mode Rejection Ratio
c
0.1
97
5
5
nA
dB
NQP
Notes
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
b. Pulse test: PW
v300
ms
duty cycle
v3%.
c. This parameter not registered with JEDEC.
Document Number: 70252
S-04031—Rev. D, 04-Jun-01
www.vishay.com
8-3
2N5196/5197/5198/5199
Vishay Siliconix
TYPICAL CHARACTERISTICS (T
A
= 25_C UNLESS OTHERWISE NOTED)
Drain Current and Transconductance
vs. Gate-Source Cutoff Voltage
5
3
g
fs
– Forward Transconductance (mS)
100 nA
I
G
@ I
D
= 200
mA
10 nA
T
A
= 125_C
I
G
– Gate Leakage
1 nA
I
GSS
@ 125_C
100 pA
200
mA
50
mA
50
mA
Gate Leakage Current
I
DSS
– Saturation Drain Current (mA)
4
g
fs
3
I
DSS
2.6
2.2
2
1.8
10 pA
T
A
= 25_C
1 pA
I
GSS
@ 25_C
1
I
DSS
@ V
DS
= 15 V, V
GS
= 0 V
g
fs
@ V
DG
= 15 V, V
GS
= 0 V
f = 1 kHz
1.4
0
0
–1
–2
–3
–4
–5
1
0.1 pA
0
10
20
30
40
50
V
DG
– Drain-Gate Voltage (V)
V
GS(off)
– Gate-Source Cutoff Voltage (V)
Output Characteristics
5
V
GS(off)
= –2 V
4
I
D
– Drain Current (mA)
I
D
– Drain Current (mA)
4
5
Output Characteristics
V
GS(off)
= –3 V
V
GS
= 0 V
–0.3 V
–0.6 V
3
–0.9 V
2
–1.2 V
–1.5 V
1
–1.8 V
–2.1 V
0
20
0
4
8
12
–2.4 V
16
3
V
GS
= 0 V
–0.2 V
2
–0.4 V
–0.6 V
1
–0.8 V
–1.0 V
–1.2 V
0
0
4
8
12
–1.4 V
16
20
V
DS
– Drain-Source Voltage (V)
V
DS
– Drain-Source Voltage (V)
Output Characteristics
2
V
GS(off)
= –2 V
1.6
I
D
– Drain Current (mA)
V
GS
= 0 V
–0.2 V
–0.4 V
1.2
–0.6 V
–0.8 V
0.8
–1.0 V
0.4
–1.2 V
–1.4 V
0
0
0.2
0.4
0.6
–1.6 V
0.8
0
1
0
0.2
I
D
– Drain Current (mA)
2.0
2.5
Output Characteristics
V
GS(off)
= –3 V
V
GS
= 0 V
–0.3 V
–0.6 V
–0.9 V
1.5
–1.2 V
1.0
–1.5 V
–1.8 V
0.5
–2.1 V
–2.4 V
0.4
0.6
0.8
1
V
DS
– Drain-Source Voltage (V)
V
DS
– Drain-Source Voltage (V)
www.vishay.com
8-4
Document Number: 70252
S-04031—Rev. D, 04-Jun-01
2N5196/5197/5198/5199
Vishay Siliconix
TYPICAL CHARACTERISTICS (T
A
= 25_C UNLESS OTHERWISE NOTED)
Transfer Characteristics
5
V
GS(off)
= –2 V
4
I
D
– Drain Current (mA)
(mV)
V
DS
= 20 V
100
V
DG
= 20 V
T
A
= 25_C
Gate-Source Differential Voltage
vs. Drain Current
3
T
A
= –55_C
V
GS1
– V
GS2
2N5199
10
2N5196
25_C
2
1
125_C
0
0
–0.5
–1.0
–1.5
–2.0
V
GS
– Gate-Source Voltage (V)
–2.5
1
0.01
0.1
I
D
– Drain Current (mA)
1
Voltage Differential with Temperature
vs. Drain Current
100
V
DG
= 20 V
DT
A
= 25 to 125_C
DT
A
= –55 to 25_C
130
Common Mode Rejection Ratio
vs. Drain Current
DV
DG
D
V
GS1
– V
GS2
(
m
V/
_C
)
CMRR = 20 log
120
CMRR (dB)
2N5199
10
110
DV
DG
= 10 – 20 V
100
5 – 10 V
90
V
GS1
– V
GS2
D
t
2N5196
D
1
0.01
80
0.1
I
D
– Drain Current (mA)
1
0.01
0.1
I
D
– Drain Current (mA)
1
Circuit Voltage Gain vs. Drain Current
r
DS(on)
– Drain-Source On-Resistance (
Ω )
100
1k
On-Resistance vs. Drain Current
80
A
V
– Voltage Gain
800
60
V
GS(off)
= –3 V
V
GS(off)
= –2 V
40
A
V
+
20
g
fs
R
L
1
)
R
L
g
os
600
V
GS(off)
= –2 V
400
V
GS(off)
= –3 V
Assume V
DD
= 15 V, V
DS
= 5 V
R
L
+
10 V
I
D
0.1
I
D
– Drain Current (mA)
1
200
0
0.01
0
0.01
0.1
I
D
– Drain Current (mA)
1
Document Number: 70252
S-04031—Rev. D, 04-Jun-01
www.vishay.com
8-5
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