Freescale Semiconductor
Advance Information
Document Number: MC33730
Rev. 6.0, 2/2010
Switch Mode Power Supply with
Multiple Linear Regulators
The 33730 is a multiple output power supply integrated circuit for
automotive applications. The integrated circuit (IC) incorporates a
switching regulator, which operates over a wide input voltage range
from 4.5 to 26.5 V.
The step-down switching regulator uses a fixed frequency PWM
voltage mode control. It has a 3.5 A current limit (typical) and the slew-
rate is adjustable via a control pin to reduce switching noise. The
switching regulator has an adjustable frequency oscillator, which
allows the user to optimize its operation over a wide range of input
voltages and component values.
The linear regulators can be configured either as two normal mode
regulators (V
DD3
, V
DDL
) and one standby regulator (V
KAM
), or as one
normal mode linear regulator (V
DDL
) and two standby regulators (V
KAM
and V
DD3
Standby). Two protected outputs [VREF (1, 2)] are used to
provide power to external sensors.
Features
33730
SWITCHING POWER SUPPLY
EK SUFFIX (PB-FREE)
98ARL10543D
32-LEAD SOICW-EP
• Provides all regulated voltages for Freescale 32-bit
ORDERING INFORMATION
microcontroller family
• Adjustable frequency switching buck regulator with slew-rate
Temperature
Package
Device
control
Range (T
A
)
• Power sequencing provided
MCZ33730EK/R2
- 40°C to 125°C
32-SOICW-EP
• Programmable voltages V
DDL
, V
DD3
- 3% accuracy
• Programmable standby regulator V
KAM
- 15% accuracy,
operating down to 4.5 V at the KA_VBAT pin
• V
DD3
can be programmed as an optional second standby regulator with 15% accuracy
• Provides two 5.0 V protected supplies for sensors
• Provides reverse battery protection FET gate drive
• Provides necessary MCU monitoring and fail-safe support
• Pb-free packaging designated by suffix code EK
33730
+
+
VBAT
PFD
KA_VBAT
VIGN
IGN_ON
BOOT
SW
VDDH
INV
VCOMP
VDD3_B
VDD3
VDDL_B
VDDL
VKAM
RSTs
REGON
+
5.0 V
3.3 V
(32 Bit)
5.0 V
+
VREF1,2
P1
P2
P3
CP
GND
HRT
MCU
1.5 V
KA_1.0 V
5.0V
Figure 1. 33730 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2009 - 2010. All rights reserved.
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VBAT
VBAT
UVLO
/OVLO
Feed
Forward
Ramp
Generator
SW
SW
Oscillator
CP
Buck
VKAM
15 mA, I
LIM,
T
LIM
Control Logic
HS Drive
Level
Shifter
FREQ
BOOT
SR
KA_VBAT
VKAM
CP
PFD
REG ON
Protection
FET
Drive
Charge
Pump
+
–
10.4 K
+
–
Enable
–
+
V
BG
INV
1.98 K
VCOMP
VIGN
IGN_ON
VDDH
T-lim
I
VDD3
Lim
, T
Lim
VDD3_B
VREF1
5.0 V
I
LI
M
=15 0mA
26.5 V,-1V,T
LIM
I
LIM
=150 mA
5.0 V
Standby
Control
Bandgap
Preference
VDD3_SBY
I
Lim
, T
Lim
VDD3
V
BG
VDDL
I
VREF2
VDDL_B
VDDL
26.5 V,-1V,T
LIM
P1
P2
P3
RSTKAM
RSTH
RST3
RSTL
Ref. Voltage
Programming
V
KAM,
V
DDL,
V
DD3,
V
DD3_SBY
Reference Voltage
V
KAM
Reset Detect
V
DDH
Reset Detect
V
DD3
Reset Detect
V
DDL
Reset Detect
Lim
Block
HR Timer
HRT
GND
Figure 2. 33730 Simplified Internal Block Diagram
33730
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
PIN CONNECTIONS
HRT
RSTKAM
RSTH
RSTL
RST3
VREF2
VDDL
VDDH
VDDL_B
VREF1
REGON
IGN_ON
VCOMP
INV
FREQ
P1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
P3
VIGN
GND
VDD3_B
VDD3
VKAM
CP
KA_VBAT
VBAT
VBAT
SW
SW
SR
BOOT
PFD
P2
Note: The exposed pad is electrically and thermally connected to the IC ground.
Figure 3. 33730 Pin Connections
Table 1. 33730 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on
page 11.
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
HRT
RSTKAM
RSTH
RSTL
RST3
VREF2
VDDL
VDDH
VDDL_B
VREF1
REGON
IGN_ON
VCOMP
INV
FREQ
P1
Pin Function
Analog
Output
Open Drain
Open Drain
Open Drain
Open Drain
Power Output
Analog Input
Analog/
Power Input
Analog
Output
Power Output
Logic Input
Open Drain
Analog
Output
Analog Input
Formal Name
Definition
Hardware Reset Timer This pin is the hardware reset timer programmed with an external resistor.
VKAM Reset
VDDH Reset
VDDL Reset
VDD3 Reset
VREF Output 2
VDDL Regulator
VDDH Regulator
VDDL Regulator Base
Drive
VREF Output 1
Regulator Hold On
VIGN Status
Compensation
Inverting Input
This pin is an open drain reset output, monitoring the V
KAM
supply to the
microprocessor.
This pin is an open drain reset output, monitoring the V
DDH
regulator.
This pin is an open drain reset output, monitoring the V
DDL
regulator.
This pin is an open drain reset output, monitoring the V
DD3
regulator.
This pin is the output of the protected supply VREF2. The pin is supplied
from the V
DDH
through the protection FET.
This pin is the V
DDL
regulator output feedback pin.
This pin is the 5.0 V output feedback pin of the buck regulator. The pin is
also a power input for the protected outputs VREF1,2.
VDDL linear regulator base drive.
This pin is the output of the protected supply VREF1. The pin is supplied
from the V
DDH
through the protection FET.
Regulator Hold On input pin (5.0 V logic level input).
This open drain output signals the status of the VIGN pin.
This pin provides switching pre-regulator compensation, it is the output of
the error amplifier.
Inverting input of the switching regulator error amplifier.
Analog Input Frequency Adjustment Frequency adjustment of the switching regulator. The value of the resistor
to ground at this pin determines the oscillator frequency.
Logic Input
Programming Pin 1
Programming pin 1 for the V
DD3
, V
DDL
, and V
KAM
reference voltages.
33730
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
Table 1. 33730 Pin Definitions(continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on
page 11.
Pin Number
17
18
19
20
21,22
23,24
25
26
27
28
Pin Name
P2
PFD
BOOT
SR
SW
VBAT
KA_VBAT
CP
VKAM
VDD3
Pin Function
Logic Input
Analog
Output
Analog Input
Analog Input
Power Output
Power Input
Power Input
Analog
Output
Power Output
Formal Name
Programming Pin 2
Protection FET Drive
Bootstrap
Slew-rate
Switch Node
Battery Voltage
Supply
Keep Alive Supply
Charge Pump
Keep Alive Memory
Definition
Programming pin 2 for the V
DD3
, V
DDL
, V
KAM
reference voltages.
Reverse battery protection FET gate drive.
This pin is connected to the bootstrap capacitor.
Slew-rate Control of the switching regulator.
These pins are the source of the internal power switch (N-channel
MOSFET).
Voltage supply to the IC (external reverse battery protection needed in
some applications).
This pin is the keep alive supply input.
External capacitor reservoir of the internal charge pump.
Keep-Alive Memory (standby) supply output.
This is a V
DD3
regulator output feedback pin.
This pin is also the output of the V
DD3
standby regulator.
29
30
31
32
VDD3_B
GND
VIGN
P3
Analog
Output
Ground
Analog Input
Logic Input
VDD3 Linear
Regulator Base Drive
Ground
Voltage Ignition
Programming Pin 3
This pin can be used also as an additional standby regulator without the
external pass transistor.
This pin is a ground.
This pin is the ignition switch control input pin. It contains an internal
protection diode.
Programming pin 3 for the V
DD3
, V
DDL
, and V
KAM
reference voltages.
Analog Input V
DD3
Linear Regulator
33730
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
Supply Voltage (VBAT)
Keep-Alive Supply Voltage (KA_VBAT)
Control Inputs (V
IGN
, P1, P2, P3), PFD Output
Bootstrap Voltage (BOOT, SR) referenced to ground
Bootstrap Voltage (BOOT, SR) referenced to SW
Charge Pump Output Voltage (CP)
Switch Node Voltage SW
Sensor Supplies (VREF1, VREF2)
Sensor Supplies (VREF1, VREF2) Maximum Slew Rate
Regulator Voltages (V
DDH
,V
DD3
, V
DD3_B
, V
DDL
,V
DDL_B
, V
KAM
)
Open Drain Outputs (RSTH, RSTL, RST3, RSTKAM, IGN_ON)
Regon Input
Analog Inputs (VCOMP, INV, FREQ, HRT)
ESD Voltage
(1)
Human Body Model - HBM (all pins except BOOT, VDDL, RSTL)
Human Body Model - HBM (Pins BOOT, VDDL, RSTL)
Machine Model - MM (all pins)
Charge Device Model - CDM (all pins)
Operational Package Temperature (Ambient Temperature)
Storage Temperature
Peak Package Reflow Temperature During Reflow
(2), (3)
Maximum Junction Temperature
Thermal Resistance, Junction to Ambient
(4)
Thermal Resistance, Junction to Case
(5)
T
A_MAX
T
STO
T
PPRT
T
J_MAX
R
θ
J-A
R
θ
J-C
V
BOOT
V
BOOT
- V
SW
V
CP
V
SW
V
REF
V
REFMAXSR
V
REG
V
DD
V
REGON
V
IN
V
ESD
± 2000
± 1500
± 200
±750
- 40 to + 125
- 65 to + 150
Note 3
150
41
1.2
°C
°C
°C
°C
°C/W
°C/W
Symbol
V
BAT
KA_V
BAT
Value
- 0.3 to +40
- 18 to +40
- 18 to +40
- 0.3 to +50
- 0.3 to +12
- 0.3 to +12
- 2.0 to +40
- 1.0 to +26.5
2.0
- 0.3 to +7.0
- 0.3 to +7.0
-0.3 to +7.0
- 0.3 to + 3.0
Unit
V
V
V
V
V
V
V
V
V/µs
V
V
V
V
V
Notes
1. ESD testing is performed in accordance with the Human Body Model (HBM) (AEC-Q100-2), the Machine Model (MM) (AEC-Q100-003),
R
ZAP
= 0
Ω),
and the Charge Device Model (CDM), Robotic (AEC-Q100-011).
2.
3.
Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes
and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.
Thermal resistance measured in accordance with EIA/JESD51-2.
Theoretical thermal resistance from the die junction to the exposed pad.
4.
5.
33730
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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