Philips Semiconductors
Product specification
CMOS single-chip 3.0V 8-bit microcontrollers
87L51FA/87L51FB
DESCRIPTION
The 87L51FA and 87L51FB Single-Chip 3.0V 8-Bit Microcontrollers
are manufactured in an advanced CMOS process and are
derivatives of the 80C51 microcontroller family. The 87L51FA/B has
the same instruction set as the 80C51.
This device provides architectural enhancements that make it
applicable in a variety of applications for general control systems.
The 87L51FA contains 8k
×
8 memory and the 87L51FB contains
16K
×
8 memory, a volatile 256
×
8 read/write data memory, four
8-bit I/O ports, three 16-bit timer/event counters, a Programmable
Counter Array (PCA), a multi-source, two-priority-level, nested
interrupt structure, an enhanced UART and on-chip oscillator and
timing circuits. For systems that require extra capability, the
87L51FA/B can be expanded using standard 3.3V TTL compatible
memories and logic.
Its added features make it an even more powerful microcontroller for
applications that require pulse width modulation, high-speed I/O and
up/down counting capabilities such as motor control. It also has a
more versatile serial channel that facilitates multiprocessor
communications.
PIN CONFIGURATIONS
T2/P1.0 1
T2EX/P1.1 2
ECI/P1.2 3
CEX0/P1.3 4
CEX1/P1.4 5
CEX2/P1.5 6
CEX3/P1.6 7
CEX4/P1.7 8
RST 9
RxD/P3.0 10
TxD/P3.1 11
INT0/P3.2 12
INT1/P3.3 13
T0/P3.4 14
T1/P3.5 15
DUAL
IN-LINE
PACKAGE
40 V
CC
39 P0.0/AD0
38 P0.1/AD1
37 P0.2/AD2
36 P0.3/AD3
35 P0.4/AD4
34 P0.5/AD5
33 P0.6/AD6
32 P0.7/AD7
31 EA/V
PP
30 ALE/PROG
29 PSEN
28 P2.7/A15
27 P2.6/A14
26 P2.5/A13
25 P2.4/A12
24 P2.3/A11
23 P2.2/A10
22 P2.1/A9
21 P2.0/A8
FEATURES
WR/P3.6 16
RD/P3.7 17
XTAL2 18
XTAL1 19
V
SS
20
•
80C51 central processing unit
•
3.0 to 4.5V V
CC
range
•
8k
×
8 EPROM (87L51FA)
16k
×
8 EPROM (87L51FB)
–
Expandable externally to 64k bytes
–
Quick Pulse programming algorithm
–
Two level program security system
SU00021
•
256
×
8 RAM, expandable externally to 64k bytes
•
Three 16-bit timer/counters
–
T2 is an up/down counter
•
Programmable Counter Array (PCA)
–
High speed output
–
Capture/compare
–
Pulse Width Modulator
–
Watchdog Timer
•
Four 8-bit I/O ports
•
Full-duplex enhanced UART
–
Framing error detection
–
Automatic address recognition
•
Power control modes
–
Idle mode
–
Power-down mode
•
Once (On Circuit Emulation) Mode
•
Five package styles
•
OTP package available
1996 Aug 16
3-150
853-1729 17200
Philips Semiconductors
Product specification
CMOS single-chip 3.0V 8-bit microcontrollers
87L51FA/87L51FB
ORDERING INFORMATION
8k
×
8
ROM
1
S83L51FA–4N40
6k
×
8
ROM
1
S83L51FB–4N40
8k
×
8
EPROM
2
S87L51FA–4N40
16k
×
8
EPROM
2
S87L51FB–4N40
OTP
TEMPERATURE RANGE
°C
AND PACKAGE
0 to +70,
40-Pin Plastic Dual In-line Package
0 to +70,
40-Pin Ceramic Dual In-line Package
w/Window
0 to +70,
44-Pin Plastic Leaded Chip Carrier
0 to +70,
44-Pin Ceramic Leaded Chip Carrier
w/Window
0 to +70,
44-Pin Plastic Quad Flat Pack
–40 to +85,
40-Pin Plastic Dual In-line Package
–40 to +85,
40-Pin Ceramic Dual In-line Package
w/Window
–40 to +85,
44-Pin Plastic Leaded Chip Carrier
–40 to +85,
44-Pin Plastic Quad Flat Pack
0 to +70,
40-Pin Plastic Dual In-line Package
0 to +70,
40-Pin Ceramic Dual In-line Package
w/Window
0 to +70,
44-Pin Plastic Leaded Chip Carrier
0 to +70,
44-Pin Ceramic Leaded Chip Carrier
w/Window
–40 to +85,
40-Pin Plastic Dual In-line Package
–40 to +85,
40-Pin Ceramic Dual In-line Package
w/Window
–40 to +85,
44-Pin Plastic Leaded Chip Carrier
FREQ.
(MHz)
3.5
to
16
3.5
to
16
3.5
to
16
3.5
to
16
3.5
to
16
3.5
to
16
3.5
to
16
3.5
to
16
3.5
to
16
3.5
to
20
3.5
to
20
3.5
to
20
3.5
to
20
3.5
to
20
3.5
to
20
3.5
to
20
DWG.
#
SOT129-1
S87L51FA–4F40
S87L51FB–4F40
UV
0590B
S83L51FA–4A44
S83L51FB–4A44
S87L51FA–4A44
S87L51FB–4A44
OTP
SOT187-2
S87L51FA–4K44
S87L51FB–4K44
UV
1472A
S83L51FA–4B44
S83L51FB–4B44
S87L51FA–4B44
S87L51FB–4B44
OTP
SOT307-2
S83L51FA–5N40
S83L51FB–5N40
S87L51FA–5N40
S87L51FB–5N40
OTP
SOT129-1
S87L51FA–5F40
S87L51FB–5F40
UV
0590B
S87L51FA–5A44
S87L51FB–5A44
S87L51FA–5A44
S87L51FB–5A44
OTP
SOT187-2
S83L51FA–5B44
S83L51FB–5B44
S87L51FA–5B44
S87L51FB–5B44
OTP
SOT307-2
S83L51FA–7N40
S83L51FB–7N40
S87L51FA–7N40
S87L51FB–7N40
OTP
SOT129-1
S87L51FA–7F40
S87L51FB–7F40
UV
0590B
S83L51FA–7A44
S83L51FB–7A44
S87L51FA–7A44
S87L51FB–7A44
OTP
SOT187-2
S87L51FA–7K44
S87L51FB–7K44
UV
1472A
S83L51FA–8N40
S83L51FB–8N40
S87L51FA–8N40
S87L51FB–8N40
OTP
SOT129-1
S87L51FA–8F40
S87L51FB–8F40
UV
0590B
S83L51FA–8A44
S83L51FB–8A44
S87L51FA–8A44
S87L51FB–8A44
OTP
SOT187-2
NOTES:
1. Contact Philips for information on low voltage Mask-ROM versions.
The 83C51FA and 83C51FB are specified for 2.7V–5.5V operation @ 16MHz.
2. OTP = One Time Programmable EPROM. UV = Erasable EPROM.
1996 Aug 16
3-151
Philips Semiconductors
Product specification
CMOS single-chip 3.0V 8-bit microcontrollers
87L51FA/87L51FB
BLOCK DIAGRAM
P0.0–P0.7
P2.0–P2.7
PORT 0
DRIVERS
V
CC
V
SS
RAM ADDR
REGISTER
RAM
PORT 0
LATCH
PORT 2
DRIVERS
PORT 2
LATCH
ROM/EPROM
B
REGISTER
ACC
STACK
POINTER
TMP2
TMP1
PROGRAM
ADDRESS
REGISTER
ALU
SFRs
TIMERS
PSW
P.C.A
BUFFER
PC
INCRE-
MENTER
PROGRAM
COUNTER
PSEN
ALE/PROG
EA/V
PP
RST
PD
TIMING
AND
CONTROL
INSTRUCTION
REGISTER
DPTR
PORT 1
LATCH
PORT 3
LATCH
OSCILLATOR
PORT 1
DRIVERS
XTAL1
XTAL2
P1.0–P1.7
PORT 3
DRIVERS
P3.0–P3.7
SU00022
1996 Aug 16
3-152
Philips Semiconductors
Product specification
CMOS single-chip 3.0V 8-bit microcontrollers
87L51FA/87L51FB
CERAMIC AND PLASTIC LEADED CHIP CARRIER
PIN FUNCTIONS
6
1
40
PLASTIC QUAD FLAT PACK
PIN FUNCTIONS
44
34
7
39
1
LCC
PQFP
33
17
29
11
23
18
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Function
NC*
P1.0/T2
P1.1/T2EX
P1.2/ECI
P1.3/CEX0
P1.4/CEX1
P1.5/CEX2
P1.6/CEX3
P1.7/CEX4
RST
P3.0/RxD
NC*
P3.1/TxD
P3.2/INT0
P3.3/INT1
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Function
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
XTAL1
V
SS
NC*
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
28
12
Pin
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
P2.7/A15
PSEN
ALE/PROG
NC*
EA/V
PP
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
V
CC
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Function
P1.5/CEX2
P1.6/CEX3
P1.7/CEX4
RST
P3.0/RxD
NC*
P3.1/TxD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
XTAL1
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Function
V
SS
NC*
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE/PROG
NC*
EA/V
PP
P0.7/AD7
22
Pin
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
V
CC
NC*
P1.0/T2
P1.1/T2EX
P1.2/ECI
P1.3/CEX0
P1.4/CEX1
* DO NOT CONNECT
SU00023
* DO NOT CONNECT
SU00024
PIN DESCRIPTIONS
PIN NUMBER
MNEMONIC
V
SS
V
CC
P0.0–0.7
DIP
20
40
39–32
LCC
22
44
43–36
QFP
16
38
37–30
TYPE
I
I
I/O
NAME AND FUNCTION
Ground:
0V reference.
Power Supply:
This is the power supply voltage for normal, idle, and power-down operation.
Port 0:
Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to
them float and can be used as high-impedance inputs. Port 0 is also the multiplexed
low-order address and data bus during accesses to external program and data memory. In
this application, it uses strong internal pull-ups when emitting 1s. Port 0 also outputs the
code bytes during program verification and receives code bytes during EPROM
programming. External pull-ups are required during program verification.
Port 1:
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 1 pins that are externally pulled low will source current because of the internal pull-ups.
(See DC Electrical Characteristics: I
IL
). Port 1 also receives the low-order address byte
during program memory verification. Alternate functions include:
T2 (P1.0):
Timer/Counter 2 external count input/Clockout
T2EX (P1.1):
Timer/Counter 2 Reload/Capture/Direction Control
ECI (P1.2):
External Clock Input to the PCA
CEX0 (P1.3):
Capture/Compare External I/O for PCA module 0
CEX1 (P1.4):
Capture/Compare External I/O for PCA module 1
CEX2 (P1.5):
Capture/Compare External I/O for PCA module 2
CEX3 (P1.6):
Capture/Compare External I/O for PCA module 3
CEX4 (P1.7):
Capture/Compare External I/O for PCA module 4
Port 2:
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 2 pins that are externally being pulled low will source current because of the internal
pull-ups. (See DC Electrical Characteristics: I
IL
). Port 2 emits the high-order address byte
during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal
pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses
(MOV @Ri), port 2 emits the contents of the P2 special function register. Some Port 2 pins
receive the high order address bits during EPROM programming and verification.
P1.0–P1.7
1–8
2–9
40–44,
1–3
I/O
1
2
3
4
5
6
7
8
P2.0–P2.7
21–28
2
3
4
5
6
7
8
9
24–31
40
41
42
43
44
1
2
3
18–25
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
1996 Aug 16
3-153
Philips Semiconductors
Product specification
CMOS single-chip 3.0V 8-bit microcontrollers
87L51FA/87L51FB
PIN DESCRIPTIONS
(Continued)
PIN NUMBER
MNEMONIC
P3.0–P3.7
DIP
10–17
LCC
11,
13–19
QFP
5,
7–13
TYPE
I/O
NAME AND FUNCTION
Port 3:
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 3 pins that are externally being pulled low will source current because of the pull-ups.
(See DC Electrical Characteristics: I
IL
). Port 3 also serves the special features of the 80C51
family, as listed below:
RxD (P3.0):
Serial input port
TxD (P3.1):
Serial output port
INT0 (P3.2):
External interrupt
INT1 (P3.3):
External interrupt
T0 (P3.4):
Timer 0 external input
T1 (P3.5):
Timer 1 external input
WR (P3.6):
External data memory write strobe
RD (P3.7):
External data memory read strobe
Reset:
A high on this pin for two machine cycles while the oscillator is running, resets the
device. An internal diffused resistor to V
SS
permits a power-on reset using only an external
capacitor to V
CC
.
Address Latch Enable/Program Pulse:
Output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 the oscillator frequency, and can be used for external timing or clocking.
Note that one ALE pulse is skipped during each access to external data memory. This pin is
also the program pulse input (PROG) during EPROM programming.
Program Store Enable:
The read strobe to external program memory. When the
87L51FA/FB is executing code from the external program memory, PSEN is activated twice
each machine cycle, except that two PSEN activations are skipped during each access to
external data memory. PSEN is not activated during fetches from internal program memory.
External Access Enable/Programming Supply Voltage:
EA must be externally held low
to enable the device to fetch code from external program memory locations 0000H and
1FFFH. If EA is held high, the device executes from internal program memory unless the
program counter contains an address greater than 1FFFH. This pin also receives the
12.75V programming supply voltage (V
PP
) during EPROM programming. If security bit 1 is
programmed, EA will be internally latched on Reset.
Crystal 1:
Input to the inverting oscillator amplifier and input to the internal clock generator
circuits.
Crystal 2:
Output from the inverting oscillator amplifier.
10
11
12
13
14
15
16
17
RST
9
11
13
14
15
16
17
18
19
10
5
7
8
9
10
11
12
13
4
I
O
I
I
I
I
O
O
I
ALE/PROG
30
33
27
I/O
PSEN
29
32
26
O
EA/V
PP
31
35
29
I
XTAL1
XTAL2
19
18
21
20
15
14
I
O
NOTE:
To avoid “latch-up” effect at power-on, the voltage on any pin at any time must not be higher than V
CC
+ 0.5V or V
SS
– 0.5V, respectively.
TIMER 2
This is a 16-bit up or down counter, which can be operated as either
a timer or event counter. It can be operated in one of three different
modes (autoreload, capture or as the baud rate generator for the
UART).
In the autoreload mode the Timer can be set to count up or down by
setting or clearing the bit DCEN in the T2CON Special Function
Register. The SFR’s RCAP2H and RCAP2L are used to reload the
Timer upon overflow or a 1-to-0 transition on the T2EX input (P1.1).
In the Capture mode Timer 2 can either set TF2 and generate an
interrupt or capture its value. To capture Timer 2 in response to a
1-to-0 transition on the T2EX input, the EXEN2 bit in the T2CON
must be set. Timer 2 is then captured in SFR’s RCAP2H and
RCAP2L.
As the baud rate generator, Timer 2 is selected by setting TCLK
and/or RCLK in T2CON. As the baud rate generator Timer 2 is
incremented at
1
/
2
the oscillator frequency.
ENHANCED UART
The 87L51FA/FB UART has all of the capabilities of the standard
80C51 UART plus Framing Error Detection and Automatic Address
Recognition. As in the 80C51, all four modes of operation are
supported as well as the 9th bit in modes 2 and 3 that can be used
to facilitate multiprocessor communication.
The Framing Error Detection allows the UART to look for missing
stop bits. If a Stop bit is missing, the FE bit in the SCON SFR is set.
The FE bit can be checked after each transmission to detect
communication errors. The FE bit can only be cleared by software
and is not affected by a valid stop bit.
Automatic Address Recognition is used to reduce the CPU service
time for the serial port. The CPU only needs to service the UART
when it is addressed and, with this done by the on-chip circuitry, the
need for software overhead is greatly reduced. This mode works
similar to the 9-bit communication mode, except that it uses only 8
bits and the Stop bit is used to cause the RI bit to be set. There are
two SFRs associated with this mode. They are SADDR, which holds
the slave address and SADEN, which contains a mask that allows
selective masking of the slave address so that broadcast addresses
can be used.
1996 Aug 16
3-154
京公网安备 11010802033920号
EEWORLD
