Philips Semiconductors
Product specification
Triacs
logic level
GENERAL DESCRIPTION
Glass passivated, sensitive gate
triacs in a plastic envelope, intended
for use in general purpose
bidirectional switching and phase
control applications. These devices
are intended to be interfaced directly
to microcontrollers, logic integrated
circuits and other low power gate
trigger circuits.
BT131 series
QUICK REFERENCE DATA
SYMBOL
V
DRM
I
T(RMS)
I
TSM
PARAMETER
BT131-
Repetitive peak off-state voltages
RMS on-state current
Non-repetitive peak on-state current
MAX. MAX. UNIT
500
500
1
16
600
600
1
16
V
A
A
PINNING - TO92
PIN
1
2
3
DESCRIPTION
main terminal 2
PIN CONFIGURATION
SYMBOL
T2
gate
main terminal 1
3 2 1
T1
G
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL
V
DRM
I
T(RMS)
I
TSM
PARAMETER
Repetitive peak off-state
voltages
RMS on-state current
Non-repetitive peak
on-state current
I
2
t for fusing
Repetitive rate of rise of
on-state current after
triggering
full sine wave; T
lead
≤51
˚C
full sine wave; T
j
= 25 ˚C prior to
surge
t = 20 ms
t = 16.7 ms
t = 10 ms
I
TM
= 1.5 A; I
G
= 0.2 A;
dI
G
/dt = 0.2 A/µs
T2+ G+
T2+ G-
T2- G-
T2- G+
CONDITIONS
MIN.
-
-
-
-
-
-
-
-
-
-
-
-
-
-40
-
-500
500
1
1
16
17.6
1.28
50
50
50
10
2
5
5
0.5
150
125
MAX.
-600
600
1
UNIT
V
A
A
A
A
2
s
A/µs
A/µs
A/µs
A/µs
A
V
W
W
˚C
˚C
I
2
t
dI
T
/dt
I
GM
V
GM
P
GM
P
G(AV)
T
stg
T
j
Peak gate current
Peak gate voltage
Peak gate power
Average gate power
Storage temperature
Operating junction
temperature
over any 20 ms period
1
Although not recommended, off-state voltages up to 800V may be applied without damage, but the triac may
switch to the on-state. The rate of rise of current should not exceed 3 A/µs.
April 1998
1
Rev 1.000
Philips Semiconductors
Product specification
Triacs
logic level
THERMAL RESISTANCES
SYMBOL
R
th j-lead
R
th j-a
PARAMETER
Thermal resistance
junction to lead
Thermal resistance
junction to ambient
CONDITIONS
full cycle
half cycle
pcb mounted;lead length = 4mm
MIN.
-
-
-
BT131 series
TYP.
-
-
150
MAX.
60
80
-
UNIT
K/W
K/W
K/W
STATIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
I
GT
PARAMETER
Gate trigger current
CONDITIONS
V
D
= 12 V; I
T
= 0.1 A
T2+ G+
T2+ G-
T2- G-
T2- G+
T2+ G+
T2+ G-
T2- G-
T2- G+
MIN.
-
-
-
-
-
-
-
-
-
-
-
0.2
-
TYP.
0.4
1.3
1.4
3.8
1.2
4.0
1.0
2.5
1.3
1.2
0.7
0.3
0.1
MAX.
3
3
3
7
5
8
5
8
5
1.5
1.5
-
0.5
UNIT
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
V
V
mA
I
L
Latching current
V
D
= 12 V; I
GT
= 0.1 A
I
H
V
T
V
GT
I
D
Holding current
On-state voltage
Gate trigger voltage
Off-state leakage current
V
D
= 12 V; I
GT
= 0.1 A
I
T
= 2.0 A
V
D
= 12 V; I
T
= 0.1 A
V
D
= 400 V; I
T
= 0.1 A; T
j
= 125 ˚C
V
D
= V
DRM(max)
; T
j
= 125 ˚C
DYNAMIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
dV
D
/dt
t
gt
PARAMETER
Critical rate of rise of
off-state voltage
Gate controlled turn-on
time
CONDITIONS
V
DM
= 67% V
DRM(max)
; T
j
= 125 ˚C;
exponential waveform; R
GK
= 1 kΩ
I
TM
= 1.5 A; V
D
= V
DRM(max)
; I
G
= 0.1 A;
dI
G
/dt = 5 A/µs
MIN.
5
-
TYP.
15
2
MAX.
-
-
UNIT
V/µs
µs
April 1998
2
Rev 1.000
Philips Semiconductors
Product specification
Triacs
logic level
BT131 series
1.4
1.2
Ptot / W
BT132D
Tmb(max) / C
IT(RMS) / A
41
53
65
0.8
1.2
BT132D
=180
1
1
51 C
1
0.8
0.6
0.4
0.2
0
0
120
90
60
30
77
0.6
89
0.4
101
113
0.2
0
0.2
0.4
0.6
IT(RMS) / A
0.8
1
125
1.2
0
-50
0
50
100
150
Tlead / C
Fig.1. Maximum on-state dissipation, P
tot
, versus rms
on-state current, I
T(RMS)
, where
α
= conduction angle.
Fig.4. Maximum permissible rms current I
T(RMS)
,
versus lead temperature T
lead
.
1000
ITSM / A
BT132D
3
IT
T
ITSM
IT(RMS) / A
BT132D
2.5
time
Tj initial = 25 C max
100
dI
T
/dt limit
T2- G+ quadrant
10
10us
2.0
1.5
1
0.5
0
0.01
100us
1ms
T/s
10ms
100ms
0.1
1
surge duration / s
10
Fig.2. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus pulse width t
p
, for
sinusoidal currents, t
p
≤
20ms.
Fig.5. Maximum permissible repetitive rms on-state
current I
T(RMS)
, versus surge duration, for sinusoidal
currents, f = 50 Hz; T
lead
≤
51˚C.
VGT(Tj)
VGT(25 C)
20
ITSM / A
BT136
IT
I TSM
T
time
1.6
1.4
1.2
1
0.8
BT136
15
Tj initial = 25 C max
10
5
0.6
0
10
100
Number of cycles at 50Hz
1000
0.4
-50
0
50
Tj / C
100
150
Fig.3. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus number of cycles, for
sinusoidal currents, f = 50 Hz.
Fig.6. Normalised gate trigger voltage
V
GT
(T
j
)/ V
GT
(25˚C), versus junction temperature T
j
.
April 1998
3
Rev 1.000
Philips Semiconductors
Product specification
Triacs
logic level
BT131 series
3
2.5
2
1.5
1
0.5
IGT(Tj)
IGT(25 C)
BT131
T2+ G+
T2+ G-
T2- G-
T2- G+
2
IT / A
Tj = 125 C
Tj = 25 C
BT134W
1.5
Vo = 1.0 V
Rs = 0.21 Ohms
typ
max
1
0.5
0
-50
0
0
50
Tj / C
100
150
0
0.5
1
VT / V
1.5
2
Fig.7. Normalised gate trigger current
I
GT
(T
j
)/ I
GT
(25˚C), versus junction temperature T
j
.
IL(Tj)
IL(25 C)
Fig.10. Typical and maximum on-state characteristic.
3
2.5
2
1.5
1
0.5
TRIAC
100
Zth j-sp (K/W)
BT134W
10
unidirectional
1
bidirectional
P
D
tp
0.1
t
0
-50
0
50
Tj / C
100
150
0.01
10us
0.1ms
1ms
10ms
tp / s
0.1s
1s
10s
Fig.8. Normalised latching current I
L
(T
j
)/ I
L
(25˚C),
versus junction temperature T
j
.
IH(Tj)
IH(25C)
Fig.11. Transient thermal impedance Z
th j-lead
, versus
pulse width t
p
.
dVD/dt (V/us)
3
2.5
2
1.5
1
0.5
TRIAC
1000
100
10
0
-50
0
50
Tj / C
100
150
1
0
50
Tj / C
100
150
Fig.9. Normalised holding current I
H
(T
j
)/ I
H
(25˚C),
versus junction temperature T
j
.
Fig.12. Typical, critical rate of rise of off-state voltage,
dV
D
/dt versus junction temperature T
j
.
April 1998
4
Rev 1.000
Philips Semiconductors
Product specification
Triacs
logic level
MECHANICAL DATA
Dimensions in mm
Net Mass: 0.2 g
BT131 series
2.54
0.66
0.56
1.6
4.2 max
4.8 max
5.2 max
12.7 min
321
Notes
1. Epoxy meets UL94 V0 at 1/8".
0.48
0.40
0.40
min
Fig.13. TO92 ; plastic envelope.
April 1998
5
Rev 1.000
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