Ordering Information .................................................................................................................................................................... 2
User Programming Interface ..................................................................................................................................... 18
Start-up output frequency and signaling types ........................................................................................................... 18
Any-frequency function ............................................................................................................................................. 19
C/SPI Control Registers...................................................................................................................................................... 28
9 I
Register Address: 0x00. DCO Frequency Control Least Significant Word (LSW) .................................................... 28
Register Address: 0x01. OE Control, DCO Frequency Control Most Significant Word (MSW) ................................. 29
Register Address: 0x02. DCO PULL RANGE CONTROL ........................................................................................ 29
Register Address: 0x03. Frac-N PLL Feedback Divider Integer Value and Frac-N PLL Feedback Divider Fraction
Value MSW ............................................................................................................................................................... 30
Register Address: 0x05. Forward Divider, Driver Control ......................................................................................... 30
Register Address: 0x06. Driver Divider, Driver Control ............................................................................................. 31
2
C Operation ........................................................................................................................................................................ 32
10 I
I
2
C protocol ............................................................................................................................................................... 32
I
2
C Timing Specification ............................................................................................................................................ 35
I
2
C Device Address Modes ....................................................................................................................................... 36
Dimensions and Patterns ........................................................................................................................................................... 43
Additional Information ................................................................................................................................................................ 44
Revision History ......................................................................................................................................................................... 45
Rev 1.01
Page 3 of 45
www.sitime.com
SiT3521
1 to 340 MHz Elite Platform I2C/SPI Programmable Oscillator
1 Electrical Characteristics
All Min and Max limits in the Electrical Characteristics tables are specified over temperature and rated operating voltage with
standard output terminations shown in the termination diagrams. Typical values are at 25°C and nominal supply voltage.
Table 1. Electrical Characteristics – Common to LVPECL, LVDS and HCSL
Parameter
Output Frequency Range
Symbol
f
Min.
1
Typ.
–
–
–
–
–
±1
–
–
–
Max.
340
Unit
MHz
Condition
Factory or user programmable, accurate to 6 decimal places
Frequency Range
Frequency Stability
Frequency Stability
F_stab
-10
-20
-25
-50
First Year Aging
F_1y
–
+10
+20
+25
+50
–
ppm
ppm
ppm
ppm
ppm
°C
°C
°C
1
st
-year aging at 25°C
Inclusive of initial tolerance, operating temperature, rated
power supply voltage and load variations.
Temperature Range
Operating Temperature Range
T_use
-20
-40
-40
+70
+85
+105
Supply Voltage
Supply Voltage
Vdd
2.97
2.7
2.52
2.25
3.3
3.0
2.8
2.5
–
–
100
–
–
–
3.63
3.3
3.08
2.75
–
30%
–
V
V
V
V
Extended Commercial
Industrial
Extended Industrial. Available only for I
2
C operation, not SPI.
Input Characteristics – OE Pin
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
VIH
VIL
Z_in
70%
–
–
Vdd
Vdd
kΩ
OE pin
OE pin
OE pin, logic high or logic low
Output Characteristics
Duty Cycle
DC
45
–
–
55
%
Startup and Output Enable/Disable Timing
Start-up Time
Output Enable/Disable Time –
Hardware control via OE pin
Output Enable/Disable Time –
Software control via I
2
C/SPI
T_start
T_oe_hw
3.0
3.8
ms
µs
Measured from the time Vdd reaches its rated minimum value
Measured from the time OE pin reaches rated VIH and VIL to
the time clock pins reach 90% of swing and high-Z.
See
Figure 9
and
Figure 10
Measured from the time the last byte of command is
transmitted via I
2
C/SPI (reg1) to the time clock pins reach 90%
of swing and high-Z. See
Figure 30
and
Figure 31
T_oe_sw
–
–
6.5
µs
Rev 1.01
Page 4 of 45
www.sitime.com
SiT3521
1 to 340 MHz Elite Platform I2C/SPI Programmable Oscillator
Table 2. Electrical Characteristics – LVPECL Specific
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Current Consumption
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Idd
I_OE
I_leak
I_driver
–
–
–
–
–
–
0.15
–
89
58
–
32
mA
mA
A
mA
Excluding Load Termination Current, Vdd = 3.3 V or 2.5 V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
Output Characteristics
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
VOH
VOL
V_Swing
Tr, Tf
Vdd - 1.1V
Vdd - 1.9V
1.2
–
–
–
1.6
225
Vdd - 0.7V
Vdd - 1.5V
2.0
290
Jitter
RMS Phase Jitter (random) –
DCO Mode Only
T_phj
–
–
RMS Phase Jitter (random) –
Any-frequency Mode Only
T_phj
–
–
RMS Period Jitter
[3]
Note:
3. Measured according to JESD65B.
T_jitt
–
0.225
0.1
0.225
0.11
1
0.340
0.14
0.340
0.15
1.6
ps
ps
ps
ps
ps
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3 V or 2.5 V
V
V
V
ps
See
Figure 5
See
Figure 5
See
Figure 6
20% to 80%, see
Figure 6
Table 3. Electrical Characteristics – LVDS Specific
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Current Consumption
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Idd
I_OE
I_leak
–
–
–
–
–
0.15
80
61
–
mA
mA
A
Excluding Load Termination Current, Vdd = 3.3 V or 2.5 V
OE = Low
OE = Low
Output Characteristics
Differential Output Voltage
Delta VOD
Offset Voltage
Delta VOS
Rise/Fall Time
VOD
ΔVOD
VOS
ΔVOS
Tr, Tf
250
–
1.125
–
–
–
–
–
–
400
455
50
1.375
50
470
Jitter
RMS Phase Jitter (random) –
DCO Mode Only
T_phj
–
–
RMS Phase Jitter (random) –
Any-frequency Mode Only
T_phj
–
–
RMS Period Jitter
[4]
Note:
4. Measured according to JESD65B.
T_jitt
–
0.21
0.1
0.21
0.1
1
0.275
0.12
0.367
0.12
1.6
ps
ps
ps
ps
ps
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3 V or 2.5 V
mV
mV
V
mV
ps
f = 156.25MHz See
Figure 7
See
Figure 7
See
Figure 7
See
Figure 7
Measured with 2 pF capacitive loading to GND, 20% to 80%,
I am currently working on my graduation project, the topic is 'Design and Implementation of Digital Recorder', this topic will use TMS320C5410 chip, the code is written in C language, I beg you to giv...
I have never touched this thing before. Can you tell me what emulator and development board should I use? Also, is it easier to develop on the system?...
[i=s]This post was last edited by Qingchengshanxia on 2016-11-21 15:36[/i] I encountered a problem again in the past two days. Some variables in the structure are required to be dynamically defined se...
Dear experts: Hello, I encountered a big problem during simulation. I needed a delay component RD5107, but there is no such component in the device library. What should I do? Is there an address to do...
This is my graduation project. I was illiterate about single-chip microcomputers before, and I don't know how I was assigned to this topic. Please give me some advice. Requirements: "Be familiar with ...
[i=s] This post was last edited by IC Crawler on 2014-11-14 13:55 [/i] [size=3] [b] I have been in contact with 430 for a long time, but I have always had a clear understanding of the low power consum...
Traditional broadcasting systems generally need to be operated manually at a fixed time, and can only realize one-way broadcasting with few functions. Traditional bell ringing equipment has a singl...[Details]
Sailing is gaining more and more attention. How to use modern technology to assist training and improve competition results is particularly important. Considering the real-time data collection in t...[Details]
1. Circuit composition
The whole circuit consists of two parts:
1. Power saving control circuit
As shown in the figure below. Including delay circuit and drive circuit.
(1) Delay ci...[Details]
1. Introduction
With the growth of parking demand, the scale of parking lots is becoming larger and larger. A lot of research has been done on intelligent parking lots in China, but most of th...[Details]
Do you often have to add brake fluid to your car's brakes? The fact that you need to pump out the brake fluid to make sure there is no gas in the brake fluid line may not be done by the car owner h...[Details]
Converged processors meet scalability requirements
In current embedded system design, solutions based on MCU, DSP, FPGA and ASIC account for more than 90% of the market share. These solutions ...[Details]
This paper designs a dot matrix LED text display screen that is easy to update, expandable, and low-cost. The way to reduce costs is
① Use the Bluetooth data transmission function of mobile ph...[Details]
For a long time, due to the limitation of hardware conditions, the display devices of traditional small handheld devices such as PDA are usually monochrome LCD, and the user interface is very simpl...[Details]
PV inverter manufacturer SMA has launched its first DC arc fault circuit interrupter (AFCI) PV inverter and has received UL certification.
The new SunnyBoy AFCI inverter models include 3000-US...[Details]
Smart lighting control systems provide high controllability for various buildings and further enhance the level of green energy. They are the core products of energy conservation and digital techn...[Details]
With the continuous consumption of earth's energy and the scarcity of resources, the harm of greenhouse effect to human beings, and the serious pollution of the atmosphere to the earth, the intern...[Details]
The traditional display screen using 51 single-chip microcomputer to control LED dot matrix has relatively simple functions. If it is to achieve diversified functions, it often takes a lot of time ...[Details]
FPGAs are used in 81% of electronic systems, including many commercial and defense products, and most FPGAs use BGA packaging. The BGA packaging is characterized by small solder balls and small sol...[Details]
Spatial Division Multiplexing (SDM) MIMO processing can significantly improve spectrum efficiency and thus greatly increase the capacity of wireless communication systems. Spatial Division Multip...[Details]
LED light sources have many environmental advantages, but early products still have certain technical bottlenecks in heat dissipation and high brightness design that cannot be broken through....[Details]
DSP and ARM Processors
京公网安备 11010802033920号
EEWORLD
