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CD4001

Description
4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14
Categorysemiconductor    logic   
File Size118KB,9 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric Compare View All

CD4001 Overview

4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14

CD4001 Parametric

Parameter NameAttribute value
Number of functions4
Number of terminals14
Maximum operating temperature85 Cel
Minimum operating temperature-40 Cel
Maximum supply/operating voltage15 V
Minimum supply/operating voltage3 V
Rated supply voltage5 V
Processing package descriptionPlastic, SO-14
stateTRANSFERRED
CraftsmanshipCMOS
packaging shapeRectangle
Package SizeSMALL OUTLINE
surface mountYes
Terminal formGULL WING
Terminal spacing1.27 mm
Terminal locationpair
Packaging MaterialsPlastic/Epoxy
Temperature levelINDUSTRIAL
series4000/14000/40000
Logic IC typeor not
Number of inputs2
propagation delay TPD250 ns
CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate • Quad 2-Input NAND Buffered B Series Gate
October 1987
Revised March 2002
CD4001BC/CD4011BC
Quad 2-Input NOR Buffered B Series Gate •
Quad 2-Input NAND Buffered B Series Gate
General Description
The CD4001BC and CD4011BC quad gates are monolithic
complementary MOS (CMOS) integrated circuits con-
structed with N- and P-channel enhancement mode tran-
sistors. They have equal source and sink current
capabilities and conform to standard B series output drive.
The devices also have buffered outputs which improve
transfer characteristics by providing very high gain.
All inputs are protected against static discharge with diodes
to V
DD
and V
SS
.
Features
s
Low power TTL:
Fan out of 2 driving 74L compatibility:
s
5V–10V–15V parametric ratings
s
Symmetrical output characteristics
s
Maximum input leakage 1
µ
A at 15V over full
temperature range
or 1 driving 74LS
Ordering Code:
Order Number
CD4001BCM
CD4001BCSJ
CD4001BCN
CD4011BCM
CD4011BCN
Package Number
M14A
M14D
N14A
M14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP, SOIC and SOP
CD4001BC
Pin Assignments for DIP and SOIC
CD4011BC
Top View
Top View
© 2002 Fairchild Semiconductor Corporation
DS005939
www.fairchildsemi.com

CD4001 Related Products

CD4001 4001B CD4001BCNX CD4001BCSJX CD4011BCNX CD4001B CD4001BC CD4001BCM CD4001BCSJ
Description 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14 4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, PDIP14 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14 4000/14000/40000 SERIES, QUAD 2-INPUT NOR GATE, PDSO14
Number of functions 4 4 4 4 4 4 4 4 4
Number of terminals 14 14 14 14 14 14 14 14 14
Maximum operating temperature 85 Cel 85 Cel 85 °C 85 °C 85 °C 85 Cel 85 Cel 85 °C 85 °C
Minimum operating temperature -40 Cel -40 Cel -40 °C -40 °C -40 °C -40 Cel -40 Cel -40 °C -40 °C
surface mount Yes Yes NO YES NO Yes Yes YES YES
Terminal form GULL WING GULL WING THROUGH-HOLE GULL WING THROUGH-HOLE GULL WING GULL WING GULL WING GULL WING
Terminal location pair pair DUAL DUAL DUAL pair pair DUAL DUAL
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
series 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000
Maker - - Fairchild Fairchild Fairchild - - Fairchild Fairchild
Parts packaging code - - DIP SOIC DIP - - SOIC SOIC
package instruction - - DIP, SOP, SOP14,.3 DIP, - - SOP, SOP14,.25 SOP, SOP14,.3
Contacts - - 14 14 14 - - 14 14
Reach Compliance Code - - unknow compli unknow - - unknow compli
JESD-30 code - - R-PDIP-T14 R-PDSO-G14 R-PDIP-T14 - - R-PDSO-G14 R-PDSO-G14
length - - 19.18 mm 10.2 mm 19.18 mm - - 8.65 mm 10.2 mm
Logic integrated circuit type - - NOR GATE NOR GATE NAND GATE - - NOR GATE NOR GATE
Number of entries - - 2 2 2 - - 2 2
Package body material - - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - - DIP SOP DIP - - SOP SOP
Package shape - - RECTANGULAR RECTANGULAR RECTANGULAR - - RECTANGULAR RECTANGULAR
Package form - - IN-LINE SMALL OUTLINE IN-LINE - - SMALL OUTLINE SMALL OUTLINE
propagation delay (tpd) - - 250 ns 250 ns 250 ns - - 250 ns 250 ns
Certification status - - Not Qualified Not Qualified Not Qualified - - Not Qualified Not Qualified
Maximum seat height - - 5.08 mm 2.1 mm 5.08 mm - - 1.75 mm 2.1 mm
Maximum supply voltage (Vsup) - - 15 V 15 V 15 V - - 15 V 15 V
Minimum supply voltage (Vsup) - - 3 V 3 V 3 V - - 3 V 3 V
Nominal supply voltage (Vsup) - - 5 V 5 V 5 V - - 5 V 5 V
technology - - CMOS CMOS CMOS - - CMOS CMOS
Terminal pitch - - 2.54 mm 1.27 mm 2.54 mm - - 1.27 mm 1.27 mm
width - - 7.62 mm 5.3 mm 7.62 mm - - 3.9 mm 5.3 mm

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