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CD4010CM

Description
Hex Buffers (Non-Inverting)
Categorylogic    logic   
File Size52KB,5 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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CD4010CM Overview

Hex Buffers (Non-Inverting)

CD4010CM Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Parts packaging codeSOIC
package instructionSOP, SOP16,.25
Contacts16
Reach Compliance Codeunknow
series4000/14000/40000
JESD-30 codeR-PDSO-G16
JESD-609 codee0
length9.9 mm
Load capacitance (CL)15 pF
Logic integrated circuit typeBUFFER
Number of functions6
Number of entries1
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output characteristicsOPEN-DRAIN
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3/15 V
Prop。Delay @ Nom-Su100 ns
propagation delay (tpd)100 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)15 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
CD4010C Hex Buffers (Non-Inverting)
October 1987
Revised June 2000
CD4010C
Hex Buffers (Non-Inverting)
General Description
The CD4010C hex buffers are monolithic complementary
MOS (CMOS) integrated circuits. The N- and P-channel
enhancement mode transistors provide a symmetrical cir-
cuit with output swings essentially equal to the supply volt-
age. This results in high noise immunity over a wide supply
voltage range. No DC power other than that caused by
leakage current is consumed during static conditions. All
inputs are protected against static discharge. These gates
may be used as hex buffers, CMOS to DTL or TTL inter-
face or as CMOS current drivers. Conversion ranges are
from 3V to 15V providing V
CC
V
DD
. The devices also
have buffered outputs which improve transfer characteris-
tics by providing very high gain.
Features
s
Wide supply voltage range:
s
Low power:
100 nW (typ.)
8 mA (min.) at V
O
=
0.5V
3.0V to 15V
s
High noise immunity: 0.45 V
DD
(typ.)
s
High current sinking:
capability: and V
DD
=
10V
Applications
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Alarm system
• Industrial controls
• Remote metering
• Computers
Ordering Code:
Order Number
CD4010CM
CD4010CN
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Schematic Diagram
Hex COS/MOS to DTL or TTL
converter (inverting).
Connect V
CC
to DTL or TTL supply.
Connect V
DD
to COS/MOS supply.
Top View
© 2000 Fairchild Semiconductor Corporation
DS005945
www.fairchildsemi.com

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