EEWORLDEEWORLDEEWORLD

Part Number

Search

CD54ACT00F3A

Description
ACT SERIES, QUAD 2-INPUT NAND GATE, CDIP14
Categorysemiconductor    logic   
File Size25KB,4 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
Download Datasheet Parametric Compare View All

CD54ACT00F3A Overview

ACT SERIES, QUAD 2-INPUT NAND GATE, CDIP14

CD54ACT00F3A Parametric

Parameter NameAttribute value
Number of functions4
Number of terminals14
Maximum operating temperature125 Cel
Minimum operating temperature-55 Cel
Maximum supply/operating voltage5.5 V
Minimum supply/operating voltage4.5 V
Rated supply voltage5 V
stateDISCONTINUED
CraftsmanshipCMOS
packaging shapeRectangle
Package SizeIN-line
Terminal formTHROUGH-hole
Terminal locationpair
Packaging MaterialsCeramic, Glass-SEALED
Temperature levelMILITARY
seriesACT
Logic IC typeNAND gate
Number of inputs2
propagation delay TPD13.2 ns
Semiconductor
CD54AC00F3A,
CD54ACT00F3A
Quad 2-Input NAND Gate
Description
The CD54AC00F3A and CD54ACT00F3A are quad 2-input
NAND gates that utilize the Harris Advanced CMOS Logic
technology.
July 1998
Features
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
• Meets JEDEC Standard No. 20
• SCR - Latch-Up-Resistant CMOS Process and Circuit
Design
• Speed of Bipolar FAST/A/S with Significantly Reduced
Power Consumption
• Functionally and Pin-Compatible with Industry 54
Bipolar Types in the FAST, AS and S Series
• Balanced Propagation Delays
• Military Operating Temperature Range
- Ceramic (CERDIP) 54 Series: . . . . . . . . -55 to 125
o
C
±24mA
Output Drive Current, Drives 75Ω Lines with-
out Need for Terminations
• Fan Out (Over Temperature)
- ACL Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2400
- FAST Loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
- AS Loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
• Balanced Noise Immunity at 30% of Supply for AC
Types
• Supply Voltage Range
- AC Types . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5V to 5.5V
- ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
Ordering Information
PART NUMBER
CD54AC00F3A
CD54ACT00F3A
NOTE:
1. Wafer and die for this part number is available which meets all elec-
trical specifications. Please contact your local sales office or Harris
customer service for ordering information.
TEMP.
RANGE (
o
C)
-55 to 125
-55 to 125
PACKAGE
14 Ld CERDIP
14 Ld CERDIP
PKG.
NO.
F14.3
F14.3
Functional Diagram
1A
1B
2A
2B
3B
3A
4B
4A
1
2
4
5
9
10
12
13
11
3
6
8
3Y
4Y
1Y
2Y
GND = 7
V
CC
= 14
TRUTH TABLE
Pinout
A
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 V
CC
13 4A
12 4B
11 4Y
10 3A
9 3B
8 3Y
INPUTS
B
L
L
H
H
OUTPUTS
Y
H
H
H
L
L
H
L
H
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
Harris Corporation 1998
File Number
3876.1
1

CD54ACT00F3A Related Products

CD54ACT00F3A CD54AC00 54AC00 CD54AC00F3A
Description ACT SERIES, QUAD 2-INPUT NAND GATE, CDIP14 AC SERIES, QUAD 2-INPUT NAND GATE, CDIP14 AC SERIES, QUAD 2-INPUT NAND GATE, CDIP14 AC SERIES, QUAD 2-INPUT NAND GATE, CDIP14
Number of functions 4 4 4 4
Number of terminals 14 14 14 14
Maximum operating temperature 125 Cel 125 Cel 125 Cel 125 Cel
Minimum operating temperature -55 Cel -55 Cel -55 Cel -55 Cel
Maximum supply/operating voltage 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply/operating voltage 4.5 V 1.5 V 1.5 V 1.5 V
Rated supply voltage 5 V 3.3 3.3 3.3
state DISCONTINUED Active Active Active
Craftsmanship CMOS CMOS CMOS CMOS
packaging shape Rectangle RECTANGULAR RECTANGULAR RECTANGULAR
Package Size IN-line IN-LINE IN-LINE IN-LINE
Terminal form THROUGH-hole THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal location pair DUAL DUAL DUAL
Packaging Materials Ceramic, Glass-SEALED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED
Temperature level MILITARY MILITARY MILITARY MILITARY
series ACT AC AC AC
Logic IC type NAND gate NAND GATE NAND GATE NAND GATE
Number of inputs 2 2 2 2
propagation delay TPD 13.2 ns 91 ns 91 ns 91 ns
Processing package description - CERAMIC, DIP-14 CERAMIC, DIP-14 CERAMIC, DIP-14
each_compli - Yes Yes Yes
sub_category - Gates Gates Gates
jesd_30_code - R-GDIP-T14 R-GDIP-T14 R-GDIP-T14
load_capacitance__cl_ - 50 pF 50 pF 50 pF
max_i_ol_ - 0.0240 Am 0.0240 Am 0.0240 Am
moisture_sensitivity_level - NOT APPLICABLE NOT APPLICABLE NOT APPLICABLE
ckage_code - DIP DIP DIP
ckage_equivalence_code - DIP14,.3 DIP14,.3 DIP14,.3
cking_method - TUBE TUBE TUBE
eak_reflow_temperature__cel_ - NOT APPLICABLE NOT APPLICABLE NOT APPLICABLE
wer_supplies__v_ - 3.3/5 3.3/5 3.3/5
._delay_nom_su - 10.2 ns 10.2 ns 10.2 ns
qualification_status - COMMERCIAL COMMERCIAL COMMERCIAL
schmitt_trigge - NO NO NO
screening_level - 38535Q/M;38534H;883B 38535Q/M;38534H;883B 38535Q/M;38534H;883B
seated_height_max - 5.08 mm 5.08 mm 5.08 mm
surface mount - NO NO NO
terminal coating - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Terminal spacing - 2.54 mm 2.54 mm 2.54 mm
ime_peak_reflow_temperature_max__s_ - NOT APPLICABLE NOT APPLICABLE NOT APPLICABLE
length - 19.43 mm 19.43 mm 19.43 mm
width - 7.62 mm 7.62 mm 7.62 mm

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1815  1865  1792  101  1372  37  38  3  28  43 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号