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5962-8868105LA

Description
Standard SRAM, 64KX4, 25ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24
Categorystorage    storage   
File Size161KB,12 Pages
ManufacturerMicross
Websitehttps://www.micross.com
Download Datasheet Parametric View All

5962-8868105LA Overview

Standard SRAM, 64KX4, 25ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24

5962-8868105LA Parametric

Parameter NameAttribute value
MakerMicross
Parts packaging codeDIP
package instructionDIP, DIP24,.3
Contacts24
Reach Compliance Codecompliant
ECCN code3A001.A.2.C
Maximum access time25 ns
Other featuresTTL COMPATIBLE INPUTS/OUTPUTS; BATTERY BACKUP; LOW POWER STANDBY
I/O typeCOMMON
JESD-30 codeR-CDIP-T24
JESD-609 codee0
memory density262144 bit
Memory IC TypeSTANDARD SRAM
memory width4
Number of functions1
Number of terminals24
word count65536 words
character code64000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize64KX4
Output characteristics3-STATE
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.3
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
power supply5 V
Certification statusQualified
Filter levelMIL-STD-883
Maximum seat height5.08 mm
Maximum standby current0.02 A
Minimum standby current4.5 V
Maximum slew rate0.14 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
Base Number Matches1
SRAM
MT5C2564
64K x 4 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY
SPECIFICATIONS
• SMD 5962-88681
• SMD 5962-88545
• MIL-STD-883
PIN ASSIGNMENT
(Top View)
FEATURES
High Speed: 15, 20, 25, 35, 45, 55, and 70
Battery Backup: 2V data retention
Low power standby
High-performance, low-power, CMOS double-metal
process
• Single +5V (+10%) Power Supply
• Easy memory expansion with CE\
• All inputs and outputs are TTL compatible
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CE\
Vss
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
A15
A14
A13
A12
A11
A10
DQ4
DQ3
DQ2
DQ1
WE\
A1
A0
NC
Vcc
NC
3 2 1 28 27
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
A8 10
A9 11
CE\ 12
26
25
24
23
22
21
20
19
18
A15
A14
A13
A12
A11
A10
DQ4
DQ3
DQ2
24-Pin DIP (C)
(300 MIL)
28-Pin LCC (EC)
13 14 15 16 17
DQ1
WE\
NC
Vss
NC
28-Pin Flat Pack (F)
OPTIONS
• Timing
15ns access
20ns access
25ns access
35ns access
45ns access
55ns access
70ns access
• Package(s)
Ceramic DIP (300 mil)
Ceramic LCC
Ceramic Flatpack
MARKING
-15
-20
-25
-35
-45
-55*
-70*
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CE\
NC
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
A15
A14
A13
A12
A11
A10
NC
NC
DQ3
DQ2
DQ1
DQ0
WE\
C
EC
F
No. 106
No. 204
GENERAL DESCRIPTION
• Operating Temperature Ranges
IT
Industrial (-40
o
C to +85
o
C)
o
o
Military (-55 C to +125 C)
XT
• 2V data retention/low power
L
The Austin Semiconductor SRAM family employs
high-speed, low-power CMOS and are fabricated using double-
layer metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications,
Austin Semiconductor offers chip enable (CE\) on all
or-
ganizations. This enhancement can place the outputs in
High-Z for additional flexibility in system design. The x4
configuration features common data input and output.
Writing to these devices is accomplished when
write enable (WE\) and CE\ inputs are both LOW. Reading
is
accomplished when WE\ remains HIGH and CE\ goes
LOW. The device offers a reduced power standby mode when
disabled. This allows system designs to achieve low standby
power requirements.
These devices operate from a single +5V power
supply and all inputs and outputs are fully TTL compatible.
Micross Components reserves the right to change products or specifications without notice.
*Electrical characteristics identical to those provided for the 45ns
access devices.
For more products and information
please visit our web site at
www.micross.com
MT5C2564
Rev. 3.2 01/10
1

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