71322S35C datasheet, PDF - EEWORLD Datasheet

71322S35C: DescriptionDual-Port SRAM, 2KX8, 35ns, CMOS, SIDEBRAZED, DIP-48; Categorystorage storage; File Size812KB，12 Pages; ManufacturerIDT (Integrated Device Technology)

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71322S35C Overview

Dual-Port SRAM, 2KX8, 35ns, CMOS, SIDEBRAZED, DIP-48

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Objectid	1156989061
package instruction	SIDEBRAZED, DIP-48
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	35 ns
JESD-30 code	R-XDIP-T48
JESD-609 code	e0
memory density	16384 bit
Memory IC Type	MULTI-PORT SRAM
memory width	8
Number of functions	1
Number of ports	2
Number of terminals	48
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2KX8
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIP
Encapsulate equivalent code	DIP48,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.015 A
Minimum standby current	4.5 V
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

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