INTEGRATED CIRCUITS
DATA SHEET
CGY2010G; CGY2011G
GSM 4 W power amplifiers
Objective specification
Supersedes data of 1995 Oct 25
File under Integrated Circuits, IC17
1996 Jul 08
Philips Semiconductors
Objective specification
GSM 4 W power amplifiers
FEATURES
•
Power Amplifier (PA) overall efficiency 45%
•
35.5 dB gain
•
0 dBm input power
•
Gain control range >55 dB
•
Integrated power sensor driver
•
Low output noise floor of PA <
−129
dBm/Hz in GSM RX
band
•
Wide operating temperature range
−20
to +85
°C
•
LQFP 48 pin package
•
Compatible with power ramping controller PCA5075
•
Compatible with GSM RF transceiver SA1620.
APPLICATIONS
•
880 to 915 MHz hand-held transceivers for E-GSM
applications
•
900 MHz TDMA systems.
QUICK REFERENCE DATA
SYMBOL
V
DD
I
DD
P
out(max)
T
amb
Note
1. For conditions, see Chapters “AC characteristics” and “DC characteristics”.
ORDERING INFORMATION
TYPE
NUMBER
CGY2010G
CGY2011G
PACKAGE
NAME
LQFP48
DESCRIPTION
PARAMETER
(1)
positive supply voltage
positive peak supply current
maximum output power
operating ambient temperature
CGY2010G; CGY2011G
GENERAL DESCRIPTION
The CGY2010G and CGY2011G are GSM class 4 GaAs
Monolithic Microwave Integrated Circuits (MMICs) power
amplifiers specifically designed to operate at 4.8 V battery
supply. These ICs also include a power sensor driver so
that no directional coupler is required in the power control
loop.
Both ICs have the same performance but are issued from
different wafer fabs.
The PAs require only a 30 dB harmonic low-pass filter to
comply with the GSM transmit spurious specification.
They can be switched off and their power controlled by
monitoring the actual drain voltage applied to the amplifier
stages.
MIN.
−
−
−
−20
TYP.
4.2
1.8
35.5
−
−
−
−
MAX.
UNIT
V
A
dBm
ο
C
+85
VERSION
SOT313-2
plastic low profile quad flat package; 48 leads; body 7
×
7
×
1.4 mm
1996 Jul 08
2
Philips Semiconductors
Objective specification
GSM 4 W power amplifiers
BLOCK DIAGRAM
CGY2010G; CGY2011G
handbook, full pagewidth
VDD1
29
VDD2
33
VDD3
42
18
SENSOR
DRIVER
DETO/VDD5
RFI
27
6,7.8
RFO/VDD4
(1)
CGY2010G
CGY2011G
31
19
MGB761
GND
VGG1
VGG2
(1) Ground pins 1 to 5, 9 to 17, 20 to 26, 28, 30, 32, 34 to 41 and 43 to 48.
Fig.1 Block diagram.
PINNING
SYMBOL
GND
RFO/V
DD4
GND
DETO/V
DD5
V
GG2
GND
RFI
GND
V
DD1
GND
V
GG1
GND
V
DD2
GND
V
DD3
GND
1996 Jul 08
PIN
1 to 5
6 to 8
9 to 17
18
19
20 to 26
27
28
29
30
31
32
33
34 to 41
42
43 to 48
ground
power amplifier output and fourth stage supply voltage
ground
power sensor output and supply voltage
fourth stage negative gate supply voltage
ground
power amplifier input
ground
first stage supply voltage
ground
first three stages negative gate supply voltage
ground
second stage supply voltage
ground
third stage supply voltage
ground
3
DESCRIPTION
Philips Semiconductors
Objective specification
GSM 4 W power amplifiers
CGY2010G; CGY2011G
46 GND
38 GND
41 GND
45 GND
40 GND
39 GND
48 GND
37 GND
44 GND
43 GND
47 GND
handbook, full pagewidth
42 VDD3
GND
GND
GND
GND
GND
RFO/VDD4
RFO/VDD4
RFO/VDD4
GND
1
2
3
4
5
6
7
8
9
36 GND
35 GND
34 GND
33 VDD2
32 GND
CGY2010G
CGY2011G
31 VGG1
30 GND
29 VDD1
28 GND
27 RFI
26 GND
25 GND
GND 10
GND 11
GND 12
GND 21
DETO/VDD5 18
VGG2 19
GND 22
GND 13
GND 14
GND 15
GND 16
GND 17
GND 20
GND 23
GND
24
MGB760
Fig.2 Pin configuration.
1996 Jul 08
4
Philips Semiconductors
Objective specification
GSM 4 W power amplifiers
FUNCTIONAL DESCRIPTION
Operating conditions
The CGY2010G and CGY2011G are designed to meet the
European Telecommunications Standards Institute (ETSI)
GSM documents, the
“ETS 300 577 specification”,
which
are defined as follows:
•
t
on
= 542.8
µs
•
T = 4.3 ms
•
Duty cycle = 1/8
The devices are specifically designed for pulse operation
allowing the use of a LQFP48 plastic package.
Power amplifier
The power amplifier consists of four cascaded gain stages
with an open-drain configuration. Each drain has to be
loaded externally by an adequate reactive circuit which
also has to be a DC path to the supply.
CGY2010G; CGY2011G
The amplifier bias is set by means of a negative voltage
applied at pins V
GG1
and V
GG2
. This negative voltage must
be present before the supply voltage is applied to the
drains to avoid current overstress for the amplifier.
Power sensor driver
The power sensor driver is a buffer amplifier that delivers
a signal to the DETO output pin which is proportional to the
amplifier power. This signal can be detected by external
diodes for power control purpose. As the sensor signal is
taken from the input of the last stage of the PA, it is isolated
from disturbances at the output by the reverse isolation of
the PA output stage.
Impedance mismatch at the PA output therefore, does not
significantly influence the signal delivered by the power
sensor as this normally occurs when power sense is made
using a directional coupler. Consequently the cost and
space of using a directional coupler are saved.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); general operating conditions applied.
SYMBOL
V
DD
V
GG
T
j(max)
T
stg
P
tot
positive supply voltage
negative supply voltage
maximum operating junction temperature
IC storage temperature
total power dissipation
PARAMETER
−
−
−
−
−
MIN.
7
−10
150
150
1.5
MAX.
V
V
°C
°C
W
UNIT
THERMAL CHARACTERISTICS
General operating conditions applied.
SYMBOL
R
th j-c
Note
1. This thermal resistance is measured under GSM pulse conditions.
PARAMETER
thermal resistance from junction to case; note 1
VALUE
32
UNIT
K/W
1996 Jul 08
5
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