LY625128PN-70LLE datasheet, PDF

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LY625128PN-70LLE: DescriptionStandard SRAM, 512KX8, 70ns, CMOS, PDIP32,; Categorystorage storage; File Size275KB，16 Pages; ManufacturerLyontek; Websitehttp://www.lyontek.com.tw/index.html

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LY625128PN-70LLE Overview

Standard SRAM, 512KX8, 70ns, CMOS, PDIP32,

LY625128PN-70LLE Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	107803289
package instruction	DIP, DIP32,.6
Reach Compliance Code	compliant
ECCN code	3A991.B.2.A
Maximum access time	70 ns
I/O type	COMMON
JESD-30 code	R-PDIP-T32
memory density	4194304 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of terminals	32
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	80 °C
Minimum operating temperature	-20 °C
organize	512KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP32,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.00003 A
Minimum standby current	2 V
Maximum slew rate	0.05 mA
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

LY625128PN-70LLE Preview

LY625128

Rev. 2.0

512K X 8 BIT LOW POWER CMOS SRAM

REVISION HISTORY

Revision

Rev. 1.0

Rev. 1.1

Rev. 1.2

Rev. 1.3

Rev. 1.4

Rev. 1.5

Rev. 2.0

Description

Initial Issue

Revised I

SB1

Revised Test Condition of I

Added -45ns Spec.

Added P-DIP PKG

Revised Test Condition of I

SB1

Adding PKG type : 44 TSOP-II

Adding SL Spec.

Revised

ABSOLUTE MAXIMUN RATINGS

Issue Date

Jul.19.2005

Oct.31.2005

Sep.20.2006

Jan.12.2007

May.14.2007

Jun.4.2007

Jul.11.2007

40 Hsuch-Fu Rd., Hsinchu, Taiwan.

TEL: 886-3-5165511

FAX: 886-3-5165522

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

LY625128

Rev. 2.0

512K X 8 BIT LOW POWER CMOS SRAM

GENERAL DESCRIPTION

The LY625128 is a 4,194,304-bit low power CMOS

static random access memory organized as 524,288

words by 8 bits. It is fabricated using very high

performance, high reliability CMOS technology. Its

standby current is stable within the range of

operating temperature.

The LY625128 is well designed for very low power

system applications, and particularly well suited for

battery back-up nonvolatile memory application.

The LY625128 operates from a single power

supply of 4.5V ~ 5.5V and all inputs and outputs are

fully TTL compatible

FEATURES

Fast access time : 35/45/55/70ns

Low power consumption:

Operating current : 50/45/40/30mA (TYP.)

Standby current : 5μA (TYP.)

Single 4.5V ~ 5.5V power supply

All inputs and outputs TTL compatible

Fully static operation

Tri-state output

Data retention voltage : 2.0V (MIN.)

Lead free and green package available

Package : 32-pin 450 mil SOP

32-pin 8mm x 20mm TSOP-I

32-pin 8mm x 13.4mm STSOP

36-ball 6mm x 8mm TFBGA

32-pin 600 mil P-DIP

44-pin 400 mil TSOP-II

PRODUCT FAMILY

Product

Family

LY625128(SL)

LY625128(SLE)

LY625128(LL)

LY625128(LLE)

LY625128(LLI)

Operating

Temperature

0 ~ 70℃

-20 ~ 80℃

0 ~ 70℃

-20 ~ 80℃

-40 ~ 85℃

Vcc Range

4.5 ~ 5.5V

Speed

35/45/55/70ns

Power Dissipation

Standby(I

SB1

TYP.) Operating(Icc,TYP.)

5µA (LL)

50/45/40/30mA

5µA (LL)

50/45/40/30mA

5µA (LL)

50/45/40/30mA

5µA (LL)

50/45/40/30mA

5µA (LL)

50/45/40/30mA

FUNCTIONAL BLOCK DIAGRAM

PIN DESCRIPTION

SYMBOL

DESCRIPTION

Address Inputs

Data Inputs/Outputs

Chip Enable Inputs

Write Enable Input

Output Enable Input

Power Supply

Ground

No Connection

Vcc

Vss

A0 - A18

DQ0 – DQ7

DECODER

512Kx8

MEMORY ARRAY

CE#

WE#

OE#

A0-A18

DQ0-DQ7

I/O DATA

CIRCUIT

COLUMN I/O

CE#

WE#

OE#

CONTROL

CIRCUIT

40 Hsuch-Fu Rd., Hsinchu, Taiwan.

TEL: 886-3-5165511

FAX: 886-3-5165522

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

LY625128

Rev. 2.0

512K X 8 BIT LOW POWER CMOS SRAM

PIN CONFIGURATION

A18

A16

A14

A12

DQ0

DQ1

DQ2

Vss

Vcc

A15

A17

WE#

A13

A11

OE#

A10

CE#

DQ7

DQ6

DQ5

DQ4

DQ3

A11

A13

WE#

A17

A15

Vcc

A18

A16

A14

A12

OE#

A10

CE#

DQ7

DQ6

DQ5

DQ4

DQ3

Vss

DQ2

DQ1

DQ0

LY625128

SOP/P-DIP

LY625128

TSOP-I/STSOP

CE#

DQ0

DQ1

Vcc

Vss

DQ2

DQ3

WE#

A18

A17

A16

A15

A14

OE#

DQ7

DQ6

Vss

Vcc

DQ5

DQ4

A10

A11

A12

A13

LY625128

DQ4

DQ5

Vss

Vcc

DQ6

WE#

DQ0

DQ1

Vcc

Vss

A18

A17

DQ2

A15 DQ3

A13

A14

DQ7 OE# CE# A16

A10

A11

A12

TSOP-II

TFBGA

40 Hsuch-Fu Rd., Hsinchu, Taiwan.

TEL: 886-3-5165511

FAX: 886-3-5165522

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

LY625128

Rev. 2.0

512K X 8 BIT LOW POWER CMOS SRAM

ABSOLUTE MAXIMUN RATINGS*

PARAMETER

Voltage on V

relative to V

Voltage on any other pin relative to V

Operating Temperature

Storage Temperature

Power Dissipation

DC Output Current

Soldering Temperature (under 10 sec)

SYMBOL

STG

OUT

SOLDER

RATING

-0.5 to 6.5

-0.5 to V

+0.5

0 to 70(C grade)

-20 to 80(E grade)

-40 to 85(I grade)

-65 to 150

260

UNIT

℃

*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress

rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this

specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.

TRUTH TABLE

MODE

Standby

Output Disable

Read

Write

Note:

CE#

OE#

WE#

I/O OPERATION

High-Z

OUT

SUPPLY CURRENT

SB1

CC1

H = V

, L = V

, X = Don't care.

DC ELECTRICAL CHARACTERISTICS

SYMBOL

TEST CONDITION

PARAMETER

Supply Voltage

Input High Voltage

Input Low Voltage

Input Leakage Current

≧

Output Leakage

≧

OUT

≧

Current

Output Disabled

Output High Voltage

= -1mA

Output Low Voltage

= 2mA

Average Operating

Power supply Current

CC1

Standby Power

Supply Current

Notes:

MIN.

4.5

2.4

- 0.2

-1

2.4

TYP.

5.0

MAX.

5.5

+0.3

0.6

0.4

UNIT

µA

SB1

- 35

Cycle time = Min.

- 45

CE# = 0.2V, I

I/O

= 0mA

other pins at 0.2V or V

- 0.2V - 55

- 70

Cycle time = 1µs

CE# = 0.2V, I

I/O

= 0mA

other pins at 0.2V or V

- 0.2V

-SL

CE#

≧

- 0.2V

Other pins at 0.2V or V

-0.2V -LL

1. V

(max) = V

+ 3.0V for pulse width less than 10ns. V

(min) = V

- 3.0V for pulse width less than 10ns.

2. Over/Undershoot specifications are characterized, not 100% tested.

3. Typical values are included for reference only and are not guaranteed or tested.

Typical valued are measured at V

= V

(TYP.) and T

= 25℃

40 Hsuch-Fu Rd., Hsinchu, Taiwan.

TEL: 886-3-5165511

FAX: 886-3-5165522

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

LY625128

Rev. 2.0

512K X 8 BIT LOW POWER CMOS SRAM

CAPACITANCE

= 25

℃

, f = 1.0MHz)

PARAMETER

Input Capacitance

Input/Output Capacitance

SYMBOL

I/O

MIN.

MAX

UNIT

Note : These parameters are guaranteed by device characterization, but not production tested.

AC TEST CONDITIONS

Input Pulse Levels

Input Rise and Fall Times

Input and Output Timing Reference Levels

Output Load

0.2V to V

- 0.2V

3ns

1.5V

= 30pF + 1TTL, I

= -2mA/4mA

AC ELECTRICAL CHARACTERISTICS

(1) READ CYCLE

PARAMETER

SYM. LY625128-35 LY625128-45 LY625128-55 LY625128-70 UNIT

MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.

Read Cycle Time

Address Access Time

Chip Enable Access Time

ACE

Output Enable Access Time

Chip Enable to Output in Low-Z

CLZ

Output Enable to Output in Low-Z t

OLZ

Chip Disable to Output in High-Z t

CHZ

Output Disable to Output in High-Z t

OHZ

Output Hold from Address Change t

(2) WRITE CYCLE

PARAMETER

SYM. LY625128-35 LY625128-45 LY625128-55 LY625128-70 UNIT

MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.

Write Cycle Time

Address Valid to End of Write

Chip Enable to End of Write

Address Set-up Time

Write Pulse Width

Write Recovery Time

Data to Write Time Overlap

Data Hold from End of Write Time t

Output Active from End of Write

Write to Output in High-Z

WHZ

*These parameters are guaranteed by device characterization, but not production tested.

40 Hsuch-Fu Rd., Hsinchu, Taiwan.

TEL: 886-3-5165511

FAX: 886-3-5165522

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

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