ASTMLPE-25-3.570MHZ-LR-SB datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> ASTMLPE-25-3.570MHZ-LR-SB

ASTMLPE-25-3.570MHZ-LR-SB: DescriptionLVCMOS Output Clock Oscillator, 3.57MHz Nom, SMD, 4 PIN; CategoryPassive components oscillator; File Size3MB，13 Pages; ManufacturerAbracon; Websitehttp://www.abracon.com/index.htm; Environmental Compliance

Download Datasheet Parametric View All

ASTMLPE-25-3.570MHZ-LR-SB Overview

LVCMOS Output Clock Oscillator, 3.57MHz Nom, SMD, 4 PIN

ASTMLPE-25-3.570MHZ-LR-SB Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	7283443750
package instruction	SMD, 4 PIN
Reach Compliance Code	compliant
Other features	STANDBY; ENABLE/DISABLE FUNCTION; TR, 7 INCH
Frequency Adjustment - Mechanical	NO
frequency stability	25%
JESD-609 code	e4
Installation features	SURFACE MOUNT
Number of terminals	4
Nominal operating frequency	3.57 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVCMOS
Output load	15 pF
physical size	3.2mm x 2.5mm x 0.75mm
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)

Preview

Download Datasheet

View All

Low power, Programmable SMD MEMS Oscillator

ASTMLP

FEATURES:

Moisture Sensitivity Level (MSL) – 1

ASTMLP

ESD Sensitive

RoHS/RoHS II compliant

2.0 x 1.6 x 0.75mm; 2.5 x 2.0 x 0.75mm;

3.2 x 2.5 x 0.75mm; 5.0 x 3.2 x 0.75mm;

7.0 x 5.0 x 0.9mm

• Industry Standard package sizes: 2.0 x 1.6 x 0.75mm, 2.5 x 2.0 x 0.75mm,

3.2 x 2.5 x 0.75mm, 5 x 3.2 x 0.75mm, 7.0 x 5.0 x 0.9mm

• Any frequency between 1MHz and 137MHz

• Supply Voltage options: 3.3V, 3.0V, 2.8V, 2.5V, 1.8V, 2.25V ~ 3.63V

• Low Current Consumption: 3.5mA typ. (@20MHz, 1.8V, no load);

4.9mA typ. (@125MHz, 1.8V, no load)

• Frequency Stability options: ±20ppm, ±25ppm, ±50ppm over -20 to +70°C

and -40 to +85°C

• Factory programmable drive strength for improved jitter, reduced EMI or

higher capacitive output load

• GPON, EPON

• Portable devices

• Consumer electronics

• Network switches, router, servers

• Ethernet, USB, SATA, SAS, Firewire

• Harsh environment (vibration, shock-prone and humid)

APPLICATIONS:

All Min and Max limits are specified over temperature and rated operating voltage with 15pF output load unless otherwise stated.

Typical values are at 25°C and nominal supply voltage.

Parameters

Min

Typ

Max

Unit

Notes

110

Output Frequency Range (F)

MHz

115

137

See Section 1.1 for Standard Frequencies

MHz

Standard Frequencies

Inclusive of initial tolerance at 25°C, 1

-20

+20

year aging at 25°C, and variations over

Frequency Stability (F

stab

)

-25

+25

ppm

operating temperature, rated power

-50

+50

supply voltage and load (15pF±10%)

Option “E”

-20

+70

°C

Operating Temperature Range (T

use

)

Option “L”

-40

+85

Option “18”

1.62

1.8

1.98

Option “25”

2.25

2.5

2.75

Option “28”

2.52

2.8

3.08

Supply Voltage (V

)

Option “30”

2.7

3.0

3.3

Option “33”

2.97

3.3

3.63

Option “Blank” (default)

2.25

3.63

3.8

Current Consumption ( I

)

3.7

3.5

6.2

5.5

4.9

OE Disable Current (I

)

2.6

Standby Current (I

std

)

1.4

0.6

Startup Time (T

start

)

Enable/Disable Time (T

)

Resume Time ( T

resume

)

4.5

4.2

4.1

7.5

6.4

5.6

4.2

4.0

4.3

2.5

1.3

130

122

µA

No load, F=20MHz, V

=2.8V,3.0V,3.3V

or 2.25V-3.63V

No load, F=20MHz, V

=2.5V

No load, F=20MHz, V

=1.8V

No load, F=125MHz,

=2.8V,3.0V,3.3V or 2.25V-3.63V

No load, F=125MHz, V

=2.5V

No load, F=125MHz, V

=1.8V

=2.5V-3.3V, OE=GND, output is in

High-Z state

=1.8V, OE=GND, output is in High-Z

state

ST=GND, V

=2.8V-3.3V, output is

weakly pulled down

ST=GND, V

=2.5V, output is weakly

pulled down

ST=GND, V

=1.8V, output is weakly

pulled down

Measured from the time V

reaches its

rated minimum value

F=110MHz. For other frequencies,

=100ns+3*cycles

F=137MHz. For other frequencies,

=100ns+3*cycles

Measured from the time ST pin crosses

50% threshold

ABRACON IS

STANDARD SPECIFICATIONS:

LLC

5101 Hidden Creek Ln Spicewood TX 78669

Phone: 512-371-6159 | Fax: 512-351-8858

For terms and conditions of sales, please visit:

www.abracon.com

REVISED:

12.14.2018

ISO9001-2015

CERTIFIED

Recommended Resources

Application circuit of TDA1514A

Dual 25W Stereo Audio Power Amplifier 01

555 acupoint detector circuit

The voltage converter that controls the frequency is generated by the RC link

Typical application circuit of MAX834/835

Tunnel diode bistable circuit

【10pm group live broadcast】Summary post (updated on October 18): [i=s] This post was last edited by 574433742 on 2015-10-12 07:34 [/i] [align=center][/align] [align=left][size=5][color=#ff00ff][b]Review of previous content: [/b][/color][/size][/align] [align=left]1...; 574433742 Integrated technical exchanges

wince automatic update application: I would like to ask the experts how to implement the following function: Platform: WinCE6.0 If there is an application myap.exe running. When I insert the SD card (there is a new version of myap.exe o...; hongfs Embedded System

How does ad630 perform half multiplication?: [p=19, null, left][size=13px]Hello, [/size][/p][p=19, null, left][size=13px]I connected it according to the datasheet, there should be no problem [/size][/p][p=19, null, left][size=13px][color=rgb(55,...; 哪哒草 Analog electronics

HMC5883 compass module: [i=s] This post was last edited by Kiev Gate on 2014-11-22 12:51 [/i] Just tuned it out, including i2c communication. . Found a strange phenomenon that the compass data cache is obviously int type but...; 基辅之门 Microcontroller MCU

Dear experts, I have a question about kernel transplantation.: I am using the linux kernel and ARM CPU. After I used make zImage to compile the 2.6.13 kernel file, and burned the /arch/arm/boot/zImage file into the board, an error occurred during linux decompress...; cooler1981 Embedded System

[FPGA Design Example] (7, 4) Linear Block Code Decoder: module decoder1(c,y,clk);output[6:0] c;input[6:0] y;input clk;reg[2:0] s;reg[6:0] e,c;always @(posedge clk) begin s[0] = y[0] ^ y[3] ^ y[5] ^ y[6]; s[1] = y[1] ^ y[3] ^ y[4] ^ y[5] ; s[2] = y[2] ^ y[4...; eeleader FPGA/CPLD

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components