XC6221C4417R-G datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Power/power management> The power supply circuit> XC6221C4417R-G

XC6221C4417R-G: DescriptionFixed Positive LDO Regulator, 4.4V, 0.14V Dropout, CMOS, PDSO4, ANTIMONY AND HALOGEN FREE, ROHS COMPLIANT, USPN-4; CategoryPower/power management The power supply circuit; File Size460KB，28 Pages; ManufacturerTOREX; Websitehttp://www.torex.co.jp/chinese/; Environmental Compliance

Download Datasheet Parametric View All

XC6221C4417R-G Overview

Fixed Positive LDO Regulator, 4.4V, 0.14V Dropout, CMOS, PDSO4, ANTIMONY AND HALOGEN FREE, ROHS COMPLIANT, USPN-4

XC6221C4417R-G Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	1921533196
package instruction	ANTIMONY AND HALOGEN FREE, ROHS COMPLIANT, USPN-4
Reach Compliance Code	compliant
Country Of Origin	Japan
ECCN code	EAR99
YTEOL	8.5
Maximum drop-back voltage 1	0.14 V
Nominal dropback voltage 1	0.08 V
Maximum input voltage	6 V
Minimum input voltage	1.6 V
JESD-30 code	R-PDSO-N4
JESD-609 code	e4
length	1.2 mm
Maximum load regulation	0.04%
Humidity sensitivity level	1
Number of functions	1
Number of terminals	4
Maximum output current 1	0.25 A
Maximum output voltage 1	4.444 V
Minimum output voltage 1	4.356 V
Nominal output voltage 1	4.4 V
Package body material	PLASTIC/EPOXY
encapsulated code	VSON
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Regulator type	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
Maximum seat height	0.4 mm
surface mount	YES
technology	CMOS
Terminal surface	NICKEL GOLD
Terminal form	NO LEAD
Terminal pitch	0.55 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	10
Maximum voltage tolerance	1%
width	0.9 mm

Preview

Download Datasheet

View All

XC6221

Series

■GENERAL

DESCRIPTION

ETR0328_015

The XC6221 series is a high accuracy, low noise, high speed, low dropout CMOS regulator with high ripple rejection. The series

includes a reference voltage source, an error amplifier, a current limiter, and a phase compensation circuit.

The CE function enables the entire circuit to be in stand-by state by inputting low level signal. As for the XC6221B/D stand-by

mode, the electric charge at the output capacitor (C

) will be discharged by the internal auto-discharge switch, and as a result

the V

OUT

pin quickly returns to the V

level. The output stabilization capacitor (C

) is also compatible with low ESR ceramic

capacitors.

Output voltage is selectable in 0.05V increments within a range of 0.80V~5.00V, using the laser trimming technology set in

factory.

The current limiter's fold-back circuit also operates as a short circuit protection and an output current limiter at the output pin.

The series achieves a fast response with only 25μA of low power consumption. Also the series has low dropout voltage

characteristics, which is 80mV at I

OUT

=100mA and V

OUT

=3.0V.

With the use of small USP-4 and ultra small USPN-4 packages, a small footprint circuit can be designed.

■APPLICATIONS

●Smart

phones / Mobile phones

●Portable

game consoles

●Digital

still cameras / Camcorders

●Digital

audio equipments

●Mobile

devices / terminals

■FEATURES

Maximum Output Current

Dropout Voltage

Operating Voltage Range

Output Voltage Range

Accuracy

: 200mA <Up to 250mA (TYP.)>

: 80mV@ I

OUT

=100mA,V

OUT

=3.0V

: 1.6V ~ 6.0V

: 0.80V~5.00V (0.05V increments)

: +2% (V

OUT

>1.50V) (Standard)

+30mV (V

OUT

≦1.45V)

(Standard)

+1% (V

OUT

>2.00V) (High Accuracy)

+20mV (V

OUT

≦1.95V)

(High Accuracy)

: 25μA (TYP.)

: Less than 0.1μA

: 70dB @ 1kHz

: CE Active High

Standby current below 0.1μA

High-Speed Auto-Discharge

(XC6221B/D)

CE Pin internally pulled-down

(XC6221C/D)

: 1.0μF ceramic capacitor

Low Power Consumption

Stand-by Current

High Ripple Rejection

CE Function

Low ESR Capacitor

Low Output Noise

Operating Ambient Temperature

: -40℃~+85℃

Packages

: USP-4, SOT-25, SSOT-24

USPN-4

: EU RoHS Compliant, Pb Free

Environmentally Friendly

■TYPICAL

APPLICATION CIRCUIT

■

TYPICAL PERFORMANCE

CHARACTERISTICS

●Load

Transient Response

XC6221x182

=2.8V , Tr=Tf=5μs

Ta=25℃ , C

=1.0μF (ceramic)

Output Voltage

1.8

Output Voltage: V

OUT

(V)

250

Output Current: I

OUT

(mA)

1.9

300

1.7

200

1.6

100mA

Output Current

150

1.5

100

1.4

10mA

1.3

Time: (500μs/div)

1/28

Recommended Resources

Infineon 650 V CoolSiC™ MOSFET Series Analysis

4-bit 8-segment digital tube drive circuit

EKG FM Demodulator Circuit

Circuit to improve linearity of opto-isolator

Demodulator circuit principle

Application circuit of CSJ-R05B and microcontroller

Sales Team: The team consists of four people, one hardware (chief engineer of the hardware department), three software (chief engineer of the software department, two bottom layer, Bluetooth and PC application de...; tryone Embedded System

Practical electronic circuit design and production examples: Practical electronic circuit design and production examples...; aronic Analog electronics

Where can I download the DumpRom.exe tool? How can I extract a file from a BIN/NB0 file?: Where can I download the DumpRom.exe tool? How can I extract a file from a BIN/NB0 file?...; liujianak Embedded System

wstrom is here to answer your questions: I followed wstrom 's step-by-step instructions on how to use uCOS-II and was able to implement my first project, helloEEworld. But when I rewrote the contents of the test.c file, I could no longer gen...; iverson_2005 Embedded System

Major policy adjustment: Shanghai cancels free bus rides for the elderly and starts giving them money instead!: Major policy adjustment: Shanghai cancels free public transportation for the elderly and gives out money instead! Shanghai plans to establish a comprehensive allowance system for the elderly, and expa...; maoshen Talking

An erroneous program, please give some advice from an expert. Two newbies to counters really can’t find the error. Thank you.: module sec (clk,seg,dig); input clk ; output[7:0]seg,dig; reg [7:0]seg,dig,date; reg [32:0]count ; reg clk1k; reg[3: 0]s_1,s_2,cnt; always@(clk) begin if (count=='d10000) begin count<=0; clk1k<=~clk1k...; 徘徊 FPGA/CPLD

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components