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ZL30136GGG2

Description
IC network synchronizer 64cabga
Categorysemiconductor    Analog mixed-signal IC   
File Size96KB,9 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Environmental Compliance  
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ZL30136GGG2 Overview

IC network synchronizer 64cabga

ZL30136GGG2 Parametric

Parameter NameAttribute value
Datasheets
ZL30136
Standard Package250
CategoryIntegrated Circuits (ICs)
FamilyClock/Timing - Application Specific
PackagingTray
PLLYes
Main PurposeEthernet, Telecom
InpuLVCMOS
OutpuLVCMOS
Number of Circuits1
Ratio - InpuOutpu
Differential - InpuOutpu
Frequency - Max125MHz
Voltage - Supply2.97 V ~ 3.63 V
Operating Temperature-40°C ~ 85°C
Mounting TypeSurface Mou
Package / Case64-BGA
Supplier Device Package64-CABGA (9x9)
ZL30136
GbE and Telecom Rate
Network Interface Synchronizer
Short Form Data Sheet
July 2009
Features
Provides synchronous clocks for network interface
cards that support synchronous Ethernet (SyncE)
in addition to telecom interfaces (T1/E1, DS3/E3,
etc.)
Supports the requirements of ITU-T G.8262 for
Synchronous Ethernet equipment slave clocks
(EEC option 1 and 2)
Synchronizes to telecom reference clocks (2 kHz,
N*8 kHz up to 77.76 MHz) or to Ethernet reference
clocks (25 MHz, 50 MHz, 62.5 MHz, 125 MHz, and
155.52 MHz)
Generates Ethernet clocks (12.5 MHz, 25 MHz,
50 MHz, 62.5 MHz, or 125 MHz)
Programmable telecom synthesizer generates
clock frequencies of any multiple of 8 kHz up to
100 MHz
Selectable loop bandwidth of 14 Hz, 28 Hz, 890 Hz,
or 0.1 Hz
Generates several styles of output frame pulses
with selectable pulse width, polarity and frequency
Provides 3 sync inputs for output frame pulse
alignment
Flexible input reference monitoring automatically
disqualifies references based on frequency and
phase irregularities
Ordering Information
ZL30136GGG
64 Pin CABGA
ZL30136GGG2 64 Pin CABGA*
*Pb Free Tin/Silver/Copper
-40°C to +85°C
Supports automatic hitless reference switching
and short term holdover during loss of reference
inputs
DPLL can be configured to provide synchronous or
asynchronous clock outputs
Configurable through a serial interface (SPI or I
2
C)
Supports IEEE 1149.1 JTAG Boundary Scan
Trays
Trays
Applications
GbE network interface cards that support
synchronous Ethernet (SyncE)
GPON ONT/ONU
T1/E1 line cards
DS3/E3 line cards
osci
osco
ref0
ref1
ref2
/N1
/N2
ref
DPLL
Ethernet
APLL
eth_clk
sync0
sync1
sync2
sync
Programmable
Synthesizer
N*8kHz
p_clk
p_fp
mode
lock
hold
I
2
C/SPI
JTAG
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2008-2009, Zarlink Semiconductor Inc. All Rights Reserved.

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