Embedded Intel486™ SX Processor
Datasheet
Product Features
s
s
s
s
s
s
32-Bit RISC Technology Core
8-Kbyte Write-Through Cache
Four Internal Write Buffers
Burst Bus Cycles
Dynamic Bus Sizing for 8- and 16-bit
Data Bus Devices
SL Technology
s
s
s
s
Data Bus Parity Generation and Checking
Boundary Scan (JTAG)
5-Volt Processor
— 196-Lead Plastic Quad Flat Pack (PQFP)
— 168-Pin Pin Grid Array (PGA)
Binary Compatible with Large Software
Base
64-Bit Interunit Transfer Bus
32-Bit Data Bus
32-Bit Data Bus
Linear Address
32
PCD
PWT
Barrel
Shifter
Register
File
ALU
Base/
Index
Bus
32
Segmentation
Unit
Descriptor
Registers
Limit and
Attribute PLA
2
Bus Interface
Paging
Unit
Cache Unit
20
32
Address
Drivers
Write Buffers
4 x 32
Data Bus
Transceivers
Bus Control
A31-A2
BE3#- BE0#
Physical
Address
Translation
Lookaside
Buffer
8 Kbyte
Cache
32
D31-D0
32
Displacement Bus
32
Prefetcher
Micro-
Instruction
32-Byte Code
Queue
2x16 Bytes
Bus Size
Control
Cache
Control
Parity
Generation
and Control
Boundary
Scan
Control
Request
Sequencer
Code
Stream
Instruction
Decode
Decoded
Instruction
Path
24
ADS# W/R# D/C# M/IO#
PCD PWT RDY# LOCK#
PLOCK# BOFF# A20M#
BREQ HOLD HLDA
RESET SRESET INTR
NMI SMI# SMIACT#
FERR# IGNNE#
STPCLK#
128
Burst Bus
Control
BRDY# BLAST#
Control &
Protection
Test Unit
BS16# BS8#
KEN# FLUSH#
AHOLD EADS#
Control
ROM
DP3-DP0 PCHK#
TCK TMS
TDI TD0
A5443-01
Order Number: 272769-004
August
2004
Information in this document is provided in connection with Intel
®
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whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to
fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not
intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel486™ SX processor may contain design defects or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
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2004
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2
Datasheet
Contents
Contents
1.0
Introduction....................................................................................................................................
5
1.1
1.2
2.0
3.0
Features................................................................................................................................ 5
Family Members ................................................................................................................... 6
How To Use This Document
......................................................................................................... 7
Pin Descriptions
............................................................................................................................ 7
3.1
3.2
Pin Assignments ................................................................................................................... 7
Pin Quick Reference ...........................................................................................................16
CPUID Instruction ...............................................................................................................23
4.1.1 Operation of the CPUID Instruction .......................................................................23
Identification After Reset.....................................................................................................24
Boundary Scan (JTAG).......................................................................................................24
4.3.1 Device Identification...............................................................................................24
4.3.2 Boundary Scan Register Bits and Bit Order...........................................................25
Maximum Ratings ...............................................................................................................25
DC Specifications ...............................................................................................................26
AC Specifications................................................................................................................27
Capacitive Derating Curves ................................................................................................33
Package Dimensions .......................................................................................................... 34
Package Thermal Specifications ........................................................................................37
4.0
Architectural and Functional Overview
.....................................................................................22
4.1
4.2
4.3
5.0
Electrical Specifications
.............................................................................................................25
5.1
5.2
5.3
5.4
6.0
Mechanical Data
..........................................................................................................................34
6.1
6.2
Figures
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Package Diagram for 168-Pin PGA Embedded Intel486™ SX Processor ................................... 8
Package Diagram for 196-Lead PQFP Embedded Intel486™ SX Processor ............................12
CLK Waveform ...........................................................................................................................29
Input Setup and Hold Timing ......................................................................................................30
Input Setup and Hold Timing ......................................................................................................30
PCHK# Valid Delay Timing.........................................................................................................31
Output Valid Delay Timing ..........................................................................................................31
Maximum Float Delay Timing .....................................................................................................32
TCK Waveform ...........................................................................................................................32
Test Signal Timing Diagram .......................................................................................................32
Typical Loading Delay versus Load Capacitance under
Worst-Case Conditions for a Low-to-High Transition, 5 V Processor.........................................33
Typical Loading Delay versus Load Capacitance under
Worst-Case Conditions for a High-to-Low Transition, 5 V Processor.........................................33
168-Pin PGA Package Dimensions ............................................................................................34
Principal Dimensions and Data for 196-Lead Plastic Quad Flat Pack Package.........................36
Typical Lead for 196-Lead PQFP Package ................................................................................37
Datasheet
3
Contents
Tables
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
The Embedded Intel486™ SX Processor Family ......................................................................... 6
Pinout Differences for 168-Pin PGA Package .............................................................................. 9
Pin Assignment for 168-Pin PGA Package .................................................................................. 9
Pin Cross Reference for 168-Pin PGA Package ........................................................................ 11
Pin Assignment for 196-Lead PQFP Package ........................................................................... 13
Pin Cross Reference for 196-Lead PQFP Package ................................................................... 14
Embedded Intel486™ SX Processor Pin Descriptions ............................................................... 16
Output Pins ................................................................................................................................. 21
Input/Output Pins........................................................................................................................ 21
Test Pins..................................................................................................................................... 21
Input Pins.................................................................................................................................... 22
CPUID Instruction Description.................................................................................................... 23
Boundary Scan Component Identification Code (5 Volt Processor) ........................................... 24
Absolute Maximum Ratings ........................................................................................................ 25
Operating Supply Voltages ......................................................................................................... 26
5 V DC Specifications................................................................................................................. 26
5 V ICC Values ........................................................................................................................... 27
AC Characteristics ...................................................................................................................... 27
AC Specifications for the Test Access Port ................................................................................ 29
168-Pin Ceramic PGA Package Dimensions ............................................................................. 35
Ceramic PGA Package Dimension Symbols .............................................................................. 35
Symbol List and Dimensions for 196-Lead PQFP Package ....................................................... 36
Thermal Resistance, qJA (×C/W) for the 196-Lead PQFP Package.......................................... 38
Thermal Resistance, qJC (×C/W) for the 196-Lead PQFP Package.......................................... 38
Thermal Resistance, qJA (×C/W) for the 168-Lead PQFP Package.......................................... 38
Maximum Tambient (T
A
, ×C) ...................................................................................................... 38
Revision History
Date
August 2004
Revision
004
Description
To address the fact that many of the package prefix variables
have changed, all package prefix variables in this document
are now indicated with an "x".
Removed 3.3 V device. Added 5 V PGA information.
Updated related documents list.
First release of this datasheet for embedded.
September 2001
December 1997
October 1995
003
002
001
4
Datasheet
Intel486™ SX Processor
1.0
Introduction
The embedded Intel486™ SX processor provides high performance to 32-bit, embedded
applications. Designed for applications that do not need a floating-point unit, the processor is ideal
for embedded designs running DOS*, Microsoft* Windows*, OS/2*, or UNIX* applications
written for the Intel architecture. Projects can be completed quickly by utilizing the wide range of
software tools, utilities, assemblers and compilers that are available for desktop computer systems.
Also, developers can find advantages in using existing chip sets and peripheral components in their
embedded designs.
The embedded Intel486 SX processor is binary compatible with the Intel386™ and earlier Intel
processors. Compared with the Intel386 processor, it provides faster execution of many commonly-
used instructions. It also provides the benefits of an integrated, 8-Kbyte, write-through cache for
code and data. Its data bus can operate in burst mode which provides up to 106-Mbyte-per-second
transfers for cache-line fills and instruction prefetches.
Intel’s SL technology is incorporated in the embedded Intel486 SX processor. Utilizing Intel’s
System Management Mode (SMM), it enables designers to develop energy-efficient systems.
Two component packages are available for 5-Volt designs. Both products operate at 33 MHz.
•
196-lead Plastic Quad Flat Pack (PQFP)
•
168-pin Pin Grid Array (PGA).
1.1
Features
The embedded Intel486 SX processor offers these features:
•
32-bit RISC-Technology Core
— The embedded Intel486 SX processor performs a complete
set of arithmetic and logical operations on 8-, 16-, and 32-bit data types using a full-width
ALU and eight general purpose registers.
•
Single Cycle Execution
— Many instructions execute in a single clock cycle.
•
Instruction Pipelining
— Overlapped instruction fetching, decoding, address translation and
execution.
•
On-Chip Cache with Cache Consistency Support
— An 8-Kbyte, write-through, internal
cache is used for both data and instructions. Cache hits provide zero wait-state access times for
data within the cache. Bus activity is tracked to detect alterations in the memory represented
by the internal cache. The internal cache can be invalidated or flushed so that an external cache
controller can maintain cache consistency.
•
External Cache Control
— Write-back and flush controls for an external cache are provided
so the processor can maintain cache consistency.
•
On-Chip Memory Management Unit
— Address management and memory space protection
mechanisms maintain the integrity of memory in a multitudinous and virtual memory
environment. Both memory segmentation and paging are supported.
•
Burst Cycles
— Burst transfers allow a new double-word to be read from memory on each
bus clock cycle. This capability is especially useful for instruction prefetch and for filling the
internal cache.
Datasheet
5
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