AT84AD001BVEPW datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Analog mixed-signal IC> converter> AT84AD001BVEPW

AT84AD001BVEPW: DescriptionADC, Proprietary Method, 8-Bit, 1 Func, 2 Channel, Parallel, 8 Bits Access, BICMOS, PQFP144, 20 X 20 MM, 1.40 MM HEIGHT, GREEN, MS-026, LQFP-144; CategoryAnalog mixed-signal IC converter; File Size2MB，68 Pages; Manufacturere2v technologies

Download Datasheet Parametric Compare View All

AT84AD001BVEPW Overview

ADC, Proprietary Method, 8-Bit, 1 Func, 2 Channel, Parallel, 8 Bits Access, BICMOS, PQFP144, 20 X 20 MM, 1.40 MM HEIGHT, GREEN, MS-026, LQFP-144

AT84AD001BVEPW Parametric

Parameter Name	Attribute value
Maker	e2v technologies
Parts packaging code	QFP
package instruction	20 X 20 MM, 1.40 MM HEIGHT, GREEN, MS-026, LQFP-144
Contacts	144
Reach Compliance Code	unknown
ECCN code	3A991.C.1
Maximum analog input voltage	0.55 V
Minimum analog input voltage	0.45 V
Converter type	ADC, PROPRIETARY METHOD
JESD-30 code	S-PQFP-G144
length	20 mm
Maximum linear error (EL)	0.3906%
Number of analog input channels	2
Number of digits	8
Number of functions	1
Number of terminals	144
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output bit code	BINARY
Output format	PARALLEL, 8 BITS
Package body material	PLASTIC/EPOXY
encapsulated code	HLFQFP
Package shape	SQUARE
Package form	FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH
Certification status	Not Qualified
Sampling rate	1000 MHz
Sample and hold/Track and hold	SAMPLE
Maximum seat height	1.6 mm
Nominal supply voltage	3.3 V
surface mount	YES
technology	BICMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	20 mm
Base Number Matches	1

Preview

Download Datasheet

View All

AT84AD001B

Dual 8-bit 1 Gsps ADC

Datasheet

1. Features

•

Dual ADC with 8-bit Resolution

1 Gsps Sampling Rate per Channel, 2 Gsps in Interleaved Mode

Single or 1:2 Demultiplexed Output

LVDS Output Format (100Ω)

500 mVpp Analog Input (Differential Only)

Differential or Single-ended 50Ω PECL/LVDS Compatible Clock Inputs

Power Supply: 3.3V (Analog), 3.3V (Digital), 2.25V (Output)

LQFP144 or LQFP-ep 144L Green Packages

Temperature Range:

– 0°C < T

amb

< 70° C (Commercial Grade)

– –40°C < T

amb

< 85° C (Industrial Grade)

•

3-wire Serial Interface

– 16-bit Data, 3-bit Address

– 1:2 or 1:1 Output Demultiplexer Ratio Selection

– Full or Partial Standby Mode

– Analog Gain (± 1.5 dB) Digital Control

– Input Clock Selection

– Analog Input Switch Selection

– Binary or Gray Logical Outputs

– Synchronous Data Ready Reset

– Data Ready Delay Adjustable on Both Channels

– Interleaving Functions:

• Offset and Gain (Channel to Channel) Calibration

• Digital Fine SDA (Fine Sampling Delay Adjust) on One Channel

– Internal Static or Dynamic Built-In Test (BIT)

2. Performance

•

Low Power Consumption: 0.7W Per Channel

Power Consumption in Standby Mode: 120 mW

1.5 GHz Full Power Input Bandwidth (–3 dB)

SNR = 42 dB Typ (6.8 ENOB), THD = –51 dBc, SFDR = –54 dBc at Fs = 1 Gsps

Fin = 500 MHz

•

2-tone IMD3: –54 dBc (499 MHz, 501 MHz) at 1 Gsps

•

DNL = 0.25 LSB, INL = 0.5 LSB

•

Low Bit Error Rate (10

–13

) at 1 Gsps

Visit our website: www.e2v.com

for the latest version of the datasheet

e2v semiconductors SAS 2009

AT84AD001B

3. Application

•

Digital Oscilloscopes

Communication Receivers (I/Q)

Direct RF Down Conversion

High Speed Data Acquisition

Radar/ECM

4. Description

The AT84AD001B is a monolithic dual 8-bit analog-to-digital converter, offering low 1.4W power con-

sumption and excellent digitizing accuracy. It integrates dual on-chip track/holds that provide an

enhanced dynamic performance with a sampling rate of up to 1 Gsps and an input frequency bandwidth

of over 1.5 GHz. The dual concept, the integrated demultiplexer and the easy interleaving mode make

this device user-friendly for all dual channel applications, such as direct RF conversion or data acquisi-

tion. The

smart

function of the 3-wire serial interface eliminates the need for external components, which

are usually necessary for gain and offset tuning and setting of other parameters, leading to space and

power reduction as well as system flexibility.

5. Functional Description

The AT84AD001B is a dual 8-bit 1 Gsps ADC based on advanced high-speed BiCMOS technology.

Each ADC includes a front-end analog multiplexer followed by a Sample and Hold (S/H), and an 8-bit

flash-like architecture core analog-to-digital converter. The output data is followed by a switchable 1:1 or

1:2 demultiplexer and LVDS output buffers (100Ω).

Two over-range bits are provided for adjustment of the external gain control on each channel.

A 3-wire serial interface (3-bit address and 16-bit data) is included to provide several adjustments:

• Analog input range adjustment (±1.5 dB) with 8-bit data control using a 3-wire bus interface (steps of

0.011 dB)

• Analog input switch: both ADCs can convert the same analog input signal I or Q

• Gray or binary encoder output. Output format: DMUX 1:1 or 1:2 with control of the output frequency

on the data ready output signal

• Partial or full standby on channel I or channel Q

• Clock selection:

– Two independent clocks: CLKI and CLKQ

– One master clock (CLKI) with the same phase for channel I and channel Q

– One master clock but with two phases (CLKI for channel I and CLKIB for channel Q)

• ISA: Internal Settling Adjustment on channel I and channel Q

• FiSDA: Fine Sampling Delay Adjustment on channel Q

• Adjustable Data Ready Output Delay on both channels

• Test mode: decimation mode (by 16), Built-In Test

A calibration phase is provided to set the two DC offsets of channel I and channel Q close to code 127.5

and calibrate the two gains. The offset and gain error can also be set externally via the 3-wire serial

interface.

0817I–BDC–09/09

e2v semiconductors SAS 2009

AT84AD001BVEPW Related Products

	AT84AD001BVEPW	AT84AD001BCEPW	AT84AD001BITD	AT84XAD001BEPW	AT84AD001BCTD
Description	ADC, Proprietary Method, 8-Bit, 1 Func, 2 Channel, Parallel, 8 Bits Access, BICMOS, PQFP144, 20 X 20 MM, 1.40 MM HEIGHT, GREEN, MS-026, LQFP-144	ADC, Proprietary Method, 8-Bit, 1 Func, 2 Channel, Parallel, 8 Bits Access, BICMOS, PQFP144, 20 X 20 MM, 1.40 MM HEIGHT, GREEN, MS-026, LQFP-144	ADC, Proprietary Method, 8-Bit, 1 Func, 2 Channel, Parallel, 8 Bits Access, BICMOS, PQFP144, 20 X 20 MM, 1.40 MM HEIGHT, LQFP-144	ADC, Proprietary Method, 8-Bit, 1 Func, 2 Channel, Parallel, 8 Bits Access, BICMOS, PQFP144, 20 X 20 MM, 1.40 MM HEIGHT, GREEN, MS-026, LQFP-144	ADC, Proprietary Method, 8-Bit, 1 Func, 2 Channel, Parallel, 8 Bits Access, BICMOS, PQFP144, 20 X 20 MM, 1.40 MM HEIGHT, LQFP-144
Maker	e2v technologies	e2v technologies	e2v technologies	e2v technologies	e2v technologies
Parts packaging code	QFP	QFP	QFP	QFP	QFP
package instruction	20 X 20 MM, 1.40 MM HEIGHT, GREEN, MS-026, LQFP-144	20 X 20 MM, 1.40 MM HEIGHT, GREEN, MS-026, LQFP-144	20 X 20 MM, 1.40 MM HEIGHT, LQFP-144	20 X 20 MM, 1.40 MM HEIGHT, GREEN, MS-026, LQFP-144	20 X 20 MM, 1.40 MM HEIGHT, LQFP-144
Contacts	144	144	144	144	144
Reach Compliance Code	unknown	unknown	unknown	compliant	unknown
ECCN code	3A991.C.1	3A991.C.1	3A991.C.1	3A991.C.1	3A991.C.1
Maximum analog input voltage	0.55 V	0.55 V	0.55 V	0.55 V	0.55 V
Minimum analog input voltage	0.45 V	0.45 V	0.45 V	0.45 V	0.45 V
Converter type	ADC, PROPRIETARY METHOD	ADC, PROPRIETARY METHOD	ADC, PROPRIETARY METHOD	ADC, PROPRIETARY METHOD	ADC, PROPRIETARY METHOD
JESD-30 code	S-PQFP-G144	S-PQFP-G144	S-PQFP-G144	S-PQFP-G144	S-PQFP-G144
length	20 mm	20 mm	20 mm	20 mm	20 mm
Maximum linear error (EL)	0.3906%	0.3906%	0.3906%	0.3906%	0.3906%
Number of analog input channels	2	2	2	2	2
Number of digits	8	8	8	8	8
Number of functions	1	1	1	1	1
Number of terminals	144	144	144	144	144
Output bit code	BINARY	BINARY	BINARY	BINARY	BINARY
Output format	PARALLEL, 8 BITS	PARALLEL, 8 BITS	PARALLEL, 8 BITS	PARALLEL, 8 BITS	PARALLEL, 8 BITS
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	HLFQFP	HLFQFP	LFQFP	HLFQFP	LFQFP
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH	FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Sampling rate	1000 MHz	1000 MHz	1000 MHz	1000 MHz	1000 MHz
Sample and hold/Track and hold	SAMPLE	SAMPLE	SAMPLE	SAMPLE	SAMPLE
Maximum seat height	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES
technology	BICMOS	BICMOS	BICMOS	BICMOS	BICMOS
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD
width	20 mm	20 mm	20 mm	20 mm	20 mm
Maximum operating temperature	85 °C	70 °C	85 °C	-	70 °C
Temperature level	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	-	COMMERCIAL

Recommended Resources

Internal structure of remote operation inverter control circuit and remote operation panel

Single button control on-off relay circuit 4

Monolithic infrared sensing control circuit

MOSFET resonant DC-DC converter circuit

6V regulated power supply circuit that can operate in the temperature range of -55℃~71℃

Bootstrap staircase wave circuit

How many MCUs has the moderator come into contact with, studied, or even mastered???: How many MCUs has the moderator come into contact with, studied, or even mastered???...; 破茧佼龙 MCU

I can't find the sample program on the st official website? Can anyone help me find the sample program for stm32f051c4: I can't find the sample program on the st official website? Can anyone help me find the sample program for stm32f051c4...; 越狱兔哥哥 stm32/stm8

Please help me how to expand Lingyang MCU: I have made a voice question-and-answer system based on the Lingyang microcontroller. How else can I expand it to make my content richer?...; 武阳 Programming Basics

In VC2005, how to make BUTTON transparent when using WINCE 5.0 ppc simulation?: I use a CBUTTONST class under WIN CE to simulate the BUTTON background transparent under EVC4.0, but when I simulate it in VC2005 using WINCE 5.0 ppc, it is not transparent. How can I solve this probl...; old60 Embedded System

What are the advantages and disadvantages of RS232-DB9 and RJ45 in the application of device data transmission serial port? Which one should be preferred?: Now some measuring equipment need to be connected to computers, data input needs to be automated, and database management is convenient. Most of these devices use RS232-DB9 serial ports, but some also...; beifenggood Embedded System

Xilinx CPLD chip programming problem: Dear experts, today I burned the program into CPLD. The first burn was successful, but the second burn failed. It gave the prompt "impact:583 The idcode read from the device does not match the idcode ...; ckwangwei FPGA/CPLD

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components