75 V/2 A Peak, Low Cost, High Frequency Half Bridge Driver
DESCRIPTION
SiP41111 is the MOSFET driver, which is designed to sim-
plify the converter design for the topologies, which requires
the high-side switch such as half bridge, two switch forward
and active clamping forward. The high-side and low-side
drivers can be configured to meet different driving require-
ment for these topologies because the high-side and low
side drivers are independent controlled. The built-in boot-
strap diode eliminates the external diode to improve the flex-
ibility PCB layout. The V
DD
undervoltage lockout prevents
the abnormal operation
.
FEATURES
•
Drives N-Channel MOSFET Half Bridge
•
•
•
•
Topology
SOIC, SOIC (PowerPAK
®
) Package Options
Lead (Pb)-free Product Available
(RoHS Compliant)
Bootstrap Supply Maximum Voltage to 75 VDC
Built-In Bootstrap Diode
RoHS
COMPLIANT
• Fast Propagation Times Meet High Frequency
Converter Circuits
• Drives 1000 pF Load with Rise and Fall Times Typical
15 ns to meet 400 kHz typical Switching Requirement
• Independent Driver Channel for Two Switch Forward and
Active Clamp Forward Topologies
• Low Power Consumption
• Supply Under Voltage Lockout
•
2.0 A Peak Sink and Source Gate Driver Current
APPLICATIONS
•
•
•
•
Half Bridge Converter
Two-Switch Forward Converters
Active Clamp Forward Converters
Bus Converters
•
Motor Control
TYPICAL APPLICATION CIRCUIT
+ 48
V
+ 12
V
V
DD
HI
HB
HO
V
OUT
+
+
HS
PWM Controller
SiP41111
LI
LO
GND
V
SS
Document Number: 74292
S-61214–Rev. A, 17-Jul-06
www.vishay.com
1
SiP41111
Vishay Siliconix
BLOCK DIAGRAMS
V
DD
HB
LEVEL SHIFT
HI
HO
HS
UNDER
VOLTAGE
LI
LO
V
SS
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage, V
DD
, V
HB
-V
HS
LI and HI
Voltage
a
a
a
a
Limit
- 0.3 to 14
- 0.3 to V
DD
+ 0.3
- 0.3 to V
DD
+ 0.3
V
HS
- 0.3 to V
HB
+ 0.3
Continuous
V
DD
= 12 V
Class 1
- 1 to +
89
+
89
100
1
Unit
Voltage on LO
Voltage on HO
Voltage on HS
a
V
Voltage on HB
a
Average Current in V
DD
to HB diode
ESD Classification
mA
kV
THERMAL INFORMATION
Parameter
Thermal Resistance (Typical)
θJA
Max Power Dissipation
Junction Temperature Range
Storage Temperature Range
Notes:
a. All voltages are referenced to ground unless otherwise specified.
b. Device mounted with all leads soldered or welded to PC board.
c. Derate 6.5 mW/°C above + 70 °C.
d. Derate 25 mW/°C above + 70 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Limit
SOIC
SOIC (PowerPak)
b
at 70 °C in Free Air (SOIC)
c
at 70 °C in Free Air (SOIC PowerPAK)
d
b
Unit
°C/W
mW
W
°C
153
40
522
2.0
- 65 to 150
- 55 to 150
RECOMMENDED OPERATING RANGE
Parameter
Supply Voltage
Voltage on HS
Voltage on HB
V
DD
Limit
+ 9 to 13.2
- 1 to 75
V
HS
+
8
to V
HS
+ 13.2 and V
DD
- 1 to V
DD
+ 75
V
Unit
www.vishay.com
2
Document Number: 74292
S-61214–Rev. A, 17-Jul-06
SiP41111
Vishay Siliconix
ELECTRICAL SPECIFICATIONS
V
DD
= V
HB
= 12 V, V
SS
= V
HS
= 0 V, no load on LO or HO, unless otherwise specified
T
J
= 25 °C
Parameter
Supply Currents
V
DD
Quiescent Current
V
DD
Operating Current
Total HB Quiescent Current
Total HB Operating Current
HB to V
SS
Quiescent
Current
HB to V
SS
Operating
Current
Input Pins
Low Level Input Voltage
Thresold
High Level Input Voltage
Threshold
Input Voltage Hysteresis
Input Pulldown Resistance
Supply Undervoltage Protection
V
DD
Rising Threshold
V
DD
Threshold Hysteresis
Bootstrap Diode
Low-Current Forward Drop
Out Voltage
High-Current Forward Drop
Out Voltage
Dynamic Resistance
LO Gate Driver
Low Level Output Voltage
High Level Output Voltage
Peak Sourcing Current
Peak Sinking Current
HO Gate Driver
Low Level Output Voltage
High Level Output Voltage
Peak Sourcing Current
Peak Sinking Current
V
OLH
V
OHH
I
OHH
I
OLH
I
HO
= 100 mA
I
HO
= - 100 mA
V
OHH
= V
HB
- V
HO
V
HO
= 0 V
V
HO
= 12 V
-
-
-
-
0.25
0.25
2
2
0.3
0.3
-
-
-
-
-
-
0.4
0.4
-
-
V
V
A
A
V
OLL
V
OHL
I
OHL
I
OLL
I
LO
= 100 mA
I
LO
- 100 mA,
V
OHL
= V
DD
- V
LO
V
LO
= 0 V
V
LO
= 12 V
-
-
-
-
0.25
0.25
2
2
0.3
0.3
-
-
-
-
-
-
0.4
V
0.4
-
A
-
V
DL
V
DH
R
D
I
VDD-HB
= 100 µA
I
VDD-HB
= 100 mA
I
VDD-HB
= 100 mA
-
-
-
1.25
1.8
1.5
1.4
2.0
-
-
-
-
1.8
V
2.2
-
Ω
V
DDR
V
DDH
6.6
-
7.1
1.3
7.6
-
6.4
-
7.8
V
-
V
IL
V
IH
V
IHYS
R
I
4
-
-
-
4.5
5.5
1.0
300
-
7
-
-
3
-
-
100
-
8
-
600
kΩ
V
I
DD
I
DDO
I
HB
I
HBO
I
HBS
I
HBSO
LI = HI = 0 V
f = 500 kHz
LI = HI = 0 V
f = 500 kHz
V
HS
= V
HB
=
89
V
f = 500 kHz
-
-
-
-
-
-
0.18
1.7
0.02
1.5
7
0.6
0.24
2.5
0.10
2.5
12
-
-
-
-
-
-
-
0.27
3
mA
0.15
3
15
-
µA
mA
Symbol
Test Conditions
Min
Typ
Max
T
J
= 40 °C to
125 °C
Min
Max
Unit
Document Number: 74292
S-61214–Rev. A, 17-Jul-06
www.vishay.com
3
SiP41111
Vishay Siliconix
ELECTRICAL SPECIFICATIONS
V
DD
= V
HB
= 12 V, V
SS
= V
HS
= 0 V, no load on LO or HO, unless otherwise specified
T
J
= 25 °C
Parameter
Lower Turn-Off Propagation
Delay (LI Falling to LO Falling)
Upper Turn-Off Propagation
Delay (HI Falling to HO Falling)
Lower Turn-On Propagation Delay
(LI Rising to LO Rising)
Upper Turn-On Propagation Delay
(HI Rising to HO Rising)
Delay Matching: Lower Turn-On and
Upper Turn-Off
Delay Matching: Lower Turn-Off and
Upper Turn-On
Low-side Output Rise Time
High-side Output Rise Time
Low-side Output Fall Time
High-side Output Fall Time
Either Output Rise Time
Driving DMOS
Either Output Fall Time
Driving DMOS
Minimum Input Pulse
Width
that Changes the Output
Bootstrap Diode Turn-On or Turn-Off
Time
Symbol
t
LPHL
t
HPHL
t
LPLH
t
HPLH
t
MON
t
MOFF
t
RCL
t
RCH
t
FCL
t
FCH
t
RD
t
FD
t
PW
t
BS
C
L
= Si7456DP
C
iss
= 3100 pF
C
L
= Si7456DP
C
iss
= 3100 pF
C
L
= 1000 pF
-
-
-
-
-
-
15
15
27
30
-
10
-
-
-
-
65
-
Test Conditions
Min
-
-
-
-
-
-
-
-
Typ
18
18
23
23
5.5
6.5
14
13
Max
-
-
-
-
-
-
-
-
ns
Unit
TIMING DIAGRAMS
LI
HI, LI
HI
t
HPLH
, t
LPLH
HO, LO
t
HPHL
, t
LPHL
LO
t
MON
t
MOFF
HO
www.vishay.com
4
Document Number: 74292
S-61214–Rev. A, 17-Jul-06
SiP41111
Vishay Siliconix
PIN CONFIGURATION
TOP VIEW
V
DD
HB
LO
V
DD
HB
TOP VIEW
LO
V
SS
LI
V
SS
PowerPak
LI
HO
HO
HS
HI
HS
HI
SOIC-8
SOIC-8 (PowerPak)
PIN DESCRIPTIONS
Symbol
V
DD
HB
HO
HS
HI
LI
V
SS
LO
PowerPAK
Input power supply to IC and lower gate drivers
Floating boostrap supply for the upper MOSFET. External bootstrap capacitor is required
Output drive for upper MOSFET. Connect to gate of upper power MOSFET
Floating GND for the upper MOSFET. Connect to source of upper power MOSFET
Input for upper drive
Input for lower drive
Ground supply
Output drive for lower MOSFET. Connect to gate of lower power MOSFET
Exposed PowerPAK is for heat dissipation. Exposed PowerPAK is floating or grounded. The PowerPad is not
guaranteed electrically isolated from all other pins
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Analog electronics
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