5962F9670401VXC datasheet, PDF

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5962F9670401VXC: DescriptionJ-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDFP16; Categorylogic logic; File Size196KB，3 Pages; ManufacturerHarris; Websitehttp://www.harris.com/

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5962F9670401VXC Overview

J-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDFP16

5962F9670401VXC Parametric

Parameter Name	Attribute value
Maker	Harris
package instruction	,
Reach Compliance Code	unknown
series	AC
JESD-30 code	R-CDFP-F16
JESD-609 code	e4
Logic integrated circuit type	J-K FLIP-FLOP
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, METAL-SEALED COFIRED
Package shape	RECTANGULAR
Package form	FLATPACK
propagation delay (tpd)	21 ns
Certification status	Not Qualified
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	FLAT
Terminal location	DUAL
total dose	300k Rad(Si) V
Trigger type	NEGATIVE EDGE
Base Number Matches	1

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5962F9670401VXC Related Products

	5962F9670401VXC	ACS112K/SAMPLE-02	ACS112D/SAMPLE	ACS112D/SAMPLE-02	5962F9670401VEC	ACS112K/SAMPLE	ACS112HMSR
Description	J-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDFP16	J-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDFP16	J-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16, SIDE BRAZED, DIP-16	J-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16, SIDE BRAZED, DIP-16	J-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16, SIDE BRAZED, DIP-16	J-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDFP16	J-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS
Maker	Harris	Harris	Harris	Harris	Harris	Harris	Harris
package instruction	,	,	DIP,	DIP,	DIP,	,	DIE,
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
series	AC	AC	AC	AC	AC	AC	AC
JESD-30 code	R-CDFP-F16	R-CDFP-F16	R-CDIP-T16	R-CDIP-T16	R-CDIP-T16	R-CDFP-F16	X-XUUC-N16
Logic integrated circuit type	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP
Number of digits	2	2	2	2	2	2	2
Number of functions	2	2	2	2	2	2	2
Number of terminals	16	16	16	16	16	16	16
Output polarity	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	UNSPECIFIED
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	UNSPECIFIED
Package form	FLATPACK	FLATPACK	IN-LINE	IN-LINE	IN-LINE	FLATPACK	UNCASED CHIP
propagation delay (tpd)	21 ns	21 ns	21 ns	21 ns	21 ns	21 ns	21 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	NO	NO	NO	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Terminal form	FLAT	FLAT	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	FLAT	NO LEAD
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	UPPER
Trigger type	NEGATIVE EDGE	NEGATIVE EDGE	NEGATIVE EDGE	NEGATIVE EDGE	NEGATIVE EDGE	NEGATIVE EDGE	NEGATIVE EDGE
Base Number Matches	1	1	1	1	-	-	-
encapsulated code	-	-	DIP	DIP	DIP	-	DIE

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