MO2020ME5-CAK-25S0-0099158001D datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> MO2020ME5-CAK-25S0-0099158001D

MO2020ME5-CAK-25S0-0099158001D: DescriptionLVCMOS Output Clock Oscillator, 99.158001MHz Nom, SOT23-5; CategoryPassive components oscillator; File Size893KB，12 Pages; ManufacturerDaishinku Corp.; Websitehttp://www.kds.info/; Environmental Compliance

Download Datasheet Parametric View All

MO2020ME5-CAK-25S0-0099158001D Overview

LVCMOS Output Clock Oscillator, 99.158001MHz Nom, SOT23-5

MO2020ME5-CAK-25S0-0099158001D Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	7216013169
package instruction	SOT23-5
Reach Compliance Code	unknown
YTEOL	6.7
Other features	STAND-BY; ENABLE/DISABLE FUNCTION; TR
maximum descent time	2 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
Installation features	SURFACE MOUNT
Number of terminals	5
Nominal operating frequency	99.158001 MHz
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Oscillator type	LVCMOS
Output load	15 pF
physical size	3.05mm x 1.75mm x 1.45mm
longest rise time	2 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %

Preview

Download Datasheet

View All

MO2020

-55°C to +125°C, Single-Chip, One-output Clock Generator

Features



Applications



Any frequency between 1 MHz to 110 MHz accurate to 6 decimal

places of accuracy

Operating temperature from -55°C to +125°C

Excellent total frequency stability as low as ±20 ppm

Low power consumption of +3.5 mA typical at 20 MHz, +1.8V

LVCMOS/LVTTL compatible output

5-pin SOT23-5: 2.9mm x 2.8mm

RoHS and REACH compliant, Pb-free, Halogen-free and

Antimony-free

For AEC-Q100 oscillators, refer to MO2024 and MO2025

Ruggedized equipment in harsh operating environment

Electrical Specifications

Table 1. Electrical Characteristics

All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise stated. Typical values are

at +25°C and nominal supply voltage.

Parameters

Output Frequency Range

Symbol

Min.

-20

Frequency Stability

F_stab

-25

-30

-50

Operating Temperature Range

T_use

-55

+1.62

+2.25

Supply Voltage

Vdd

+2.52

+2.7

+2.97

+2.25

–

Current Consumption

Idd

–

OE Disable Current

I_od

–

Standby Current

I_std

–

Duty Cycle

Rise/Fall Time

Tr, Tf

–

Output High Voltage

VOH

90%

Typ.

–

+1.8

+2.5

+2.8

+3.0

+3.3

–

+3.8

+3.6

+3.5

–

+2.6

+1.4

+0.6

–

1.0

1.3

1.0

–

Max.

110

+20

+25

+30

+50

+125

+1.98

+2.75

+3.08

+3.3

+3.63

+4.7

+4.5

+4.3

+8.5

+5.5

+4.0

2.0

2.5

3.0

–

Unit

MHz

ppm

°C

μA

Vdd

No load condition, f = 20 MHz,

Vdd = +2.8V, +3.0V, +3.3V or +2.25 to +3.63V

No load condition, f = 20 MHz, Vdd = +2.5V

No load condition, f = 20 MHz, Vdd = +1.8V

Vdd = 2.5V to +3.3V, OE = Low, Output in high Z state

Vdd = +1.8V, OE = Low, Output in high Z state

Vdd = +2.8V to +3.3V,

= Low, Output is weakly pulled down

Vdd = +2.5V,

= Low, Output is weakly pulled down

Vdd = +1.8V,

= Low, Output is weakly pulled down

All Vdds

Vdd = +2.5V, +2.8V, +3.0V or +3.3V, 20% - 80%

Vdd =+1.8V, 20% - 80%

Vdd = +2.25V - +3.63V, 20% - 80%

IOH = -4.0 mA (Vdd = +3.0V or +3.3V)

IOH = -3.0 mA (Vdd = +2.8V and Vdd = +2.5V)

IOH = -2.0 mA (Vdd = +1.8V)

IOL = +4.0 mA (Vdd = +3.0V or +3.3V)

IOL = +3.0 mA (Vdd = +2.8V and Vdd = +2.5V)

IOL = +2.0 mA (Vdd = +1.8V)

Inclusive of Initial tolerance at +25°C, 1st year aging at +25°C,

and variations over operating temperature, rated power supply

voltage and load (15 pF ± 10%).

Condition

Refer to

Table 14

for the exact list of supported frequencies

Frequency Range

Frequency Stability and Aging

Operating Temperature Range

Supply Voltage and Current Consumption

LVCMOS Output Characteristics

Output Low Voltage

VOL

–

10%

Vdd

Input Characteristics

Input High Voltage

Input Low Voltage

Input Pull-up Impedance

VIH

VIL

Z_in

70%

–

2.0

–

30%

150

–

Vdd

kΩ

MΩ

Pin 3, OE or

Pin 3, OE logic high or logic low, or

logic high

Pin 3,

logic low

+81-79-426-3211

www.kds.info

Revised September 29, 2015

Daishinku Corp.

Rev. 1.01

1389 Shinzaike, Hiraoka-cho, Kakogawa, Hyogo 675-0194 Japan

Recommended Resources

A design plan for a serial communication interface circuit

Range hood automatic controller circuit

STK058 power amplifier circuit diagram

Negative reference voltage circuit 2

555 thyristor pulse disappearance detection circuit

Computer motherboard circuit diagram 810 1_20

How to connect TL494 and let the microcontroller control TL494 to generate PWM waves with different duty cycles?: Hey guys, I'm new to switching power supplies. I've been reading the TL494 manual for a long time, but I still don't understand how the microcontroller controls the TL494 to generate PWM waves with di...; iczibm Power technology

I am a novice and have just started to work with AD. I would like to ask about the library packaging and transplantation issues?: I'm a newbie. I just started to use AD and encountered some minor problems. The book I bought has some scattered device diagrams and schematics. I want to organize them and make a library, but I can't...; 小小的人丶 PCB Design

About the problem of SPI clock not output: Does SPI have a clock signal as long as it sends data? Now there is data sent out, but there is no clock signal output. I have set it up like this: master mode, SDO controlled by the module, 8-bit tra...; 明月清风 Embedded System

Ask about the CAN communication between two 2407 chips: There are two 2407 chips on a board, 5cm apart. If I directly cross-connect the CAN transceiver interface, is it feasible? Do I need 82C50 between them? I have used SPI and SCI, and I want to try CAN....; niantianxia Microcontroller MCU

On the selection of single chip microcomputer for oscilloscope: Regarding the dynamic display of the oscilloscope, to display a 10M bandwidth, no evaluation rate is required, no other processing is required, just sample and display the waveform. So can a crystal o...; dyh420 DIY/Open Source Hardware

MSP430 JTAG interface and BSW interface: 1. JTAG port, JTAG pins are defined as follows:MCU TCK - test clock input, connected to the emulator's 7-pinMCU TDI - test data input, connected to the emulator's 2-pinMCU TDO - test data output, conn...; 火辣西米秀 Microcontroller MCU

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components