B41821-A8277-M datasheet, PDF - EEWORLD Datasheet

B41821-A8277-M: DescriptionAluminum Electrolytic Capacitor, Polarized, Aluminum (wet), 63V, 20% +Tol, 20% -Tol, 270uF, Through Hole Mount, RADIAL LEADED; CategoryPassive components capacitor; File Size614KB，35 Pages; ManufacturerTDK Corporation; Websitehttp://www.tdk.com; Environmental Compliance

Download Datasheet Parametric View All

B41821-A8277-M Overview

Aluminum Electrolytic Capacitor, Polarized, Aluminum (wet), 63V, 20% +Tol, 20% -Tol, 270uF, Through Hole Mount, RADIAL LEADED

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	1918510114
package instruction	,
Reach Compliance Code	compliant
capacitance	270 µF
Capacitor type	ALUMINUM ELECTROLYTIC CAPACITOR
dielectric materials	ALUMINUM (WET)
ESR	740 mΩ
JESD-609 code	e3
leakage current	0.1701 mA
Installation features	THROUGH HOLE MOUNT
negative tolerance	20%
Number of terminals	2
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package shape	CYLINDRICAL PACKAGE
method of packing	BULK
polarity	POLARIZED
positive tolerance	20%
Rated (DC) voltage (URdc)	63 V
ripple current	580 mA
surface mount	NO
Delta tangent	0.12
Terminal surface	Matte Tin (Sn)
Terminal shape	WIRE

Aluminum electrolytic capacitors

Single-ended capacitors

Series/Type:

Date:

B41821, B43821

November 2008

information contained therein without EPCOS' prior express consent is prohibited.

430 stepper motor driver: [i=s]This post was last edited by paulhyde on 2014-9-15 03:54[/i] They are all debugged and work very well!...; muyilight Electronics Design Contest

How is the DSP's RF5 framework actually used?: Dear friends, I have never been exposed to dsp, and I came across the RF5 reference framework directly. My goal is to learn how to modify it to develop a program of my own. The theory is confusing, bu...; huj Embedded System

The data of STM32 ADC is tampered when using DMA mode: During the recent test, it was found that the data read by STM32 ADC using DMA mode would appear as follows I started to suspect that it was high-frequency interference from external signals. After a ...; littleshrimp stm32/stm8

raw-os has been updated to version 1091: raw-os has been updated to version 1091. Please download it from the official website: http://www.raw-os.org/Download.html. For the revision history, please refer to: https://github.com/jorya/raw-os....; jorya_txj Embedded System

About PLL optimization: I use PLL to generate 6 divided clocks, but only one divided clock can be used at the same time. Quartus optimizes the other unused divided clocks and only routes one clock. Is there any way to preven...; zhenpeng25 FPGA/CPLD

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components