A3P125-QNG132 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Programmable logic devices> Programmable logic> A3P125-QNG132

A3P125-QNG132: DescriptionIC fpga 84 I/O 132qfn; CategoryProgrammable logic devices Programmable logic; File Size1MB，27 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com; Environmental Compliance

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A3P125-QNG132 Overview

IC fpga 84 I/O 132qfn

A3P125-QNG132 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Microsemi
package instruction	HVBCC,
Reach Compliance Code	compliant
maximum clock frequency	350 MHz
JESD-30 code	S-XBCC-B132
length	8 mm
Humidity sensitivity level	3
Configurable number of logic blocks	3072
Equivalent number of gates	125000
Number of terminals	132
Maximum operating temperature	85 °C
Minimum operating temperature
organize	3072 CLBS, 125000 GATES
Package body material	UNSPECIFIED
encapsulated code	HVBCC
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	0.8 mm
Maximum supply voltage	1.575 V
Minimum supply voltage	1.425 V
Nominal supply voltage	1.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	BUTT
Terminal pitch	0.5 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	8 mm

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™

Power Matters.

A[17:0

]

OVFL

ADD_S

LUT4

FPGA and SoC Product Catalog

+/-

[43

]

C[43:0

]

B[17:0

SHIFT

ASC

SEL_C

>> 17

_SR

CLK

RS T

SECURITY

:0]

N-1

[43

RELIABILITY

LOW POWER

I N T E G R AT I O N

FPGAs

SoC FPGAs

Design Tools

Design Hardware

Intellectual Property

A3P125-QNG132 Related Products

	A3P125-QNG132	A3P060-QNG132	AGL-ICICLE-KIT	A3P250-QNG132
Description	IC fpga 84 I/O 132qfn	IC fpga 80 I/O 132qfn	kit eval for igoo icicle	IC fpga 87 I/O 132qfn
Is it Rohs certified?	conform to	conform to	-	conform to
package instruction	HVBCC,	HVBCC,	-	HVBCC,
Reach Compliance Code	compliant	compliant	-	compliant
maximum clock frequency	350 MHz	350 MHz	-	350 MHz
JESD-30 code	S-XBCC-B132	S-XBCC-B132	-	S-XBCC-B132
length	8 mm	8 mm	-	8 mm
Humidity sensitivity level	3	3	-	3
Configurable number of logic blocks	3072	1536	-	6144
Equivalent number of gates	125000	60000	-	250000
Number of terminals	132	132	-	132
Maximum operating temperature	85 °C	85 °C	-	85 °C
organize	3072 CLBS, 125000 GATES	1536 CLBS, 60000 GATES	-	6144 CLBS, 250000 GATES
Package body material	UNSPECIFIED	UNSPECIFIED	-	UNSPECIFIED
encapsulated code	HVBCC	HVBCC	-	HVBCC
Package shape	SQUARE	SQUARE	-	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	-	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260	-	260
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	-	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified	Not Qualified	-	Not Qualified
Maximum seat height	0.8 mm	0.8 mm	-	0.8 mm
Maximum supply voltage	1.575 V	1.575 V	-	1.575 V
Minimum supply voltage	1.425 V	1.425 V	-	1.425 V
Nominal supply voltage	1.5 V	1.5 V	-	1.5 V
surface mount	YES	YES	-	YES
technology	CMOS	CMOS	-	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	-	COMMERCIAL
Terminal form	BUTT	BUTT	-	BUTT
Terminal pitch	0.5 mm	0.5 mm	-	0.5 mm
Terminal location	BOTTOM	BOTTOM	-	BOTTOM
Maximum time at peak reflow temperature	30	30	-	30
width	8 mm	8 mm	-	8 mm

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