74AVC16374DGG,512 datasheet, PDF

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74AVC16374DGG,512: DescriptionIC D-type pos trg dual 48tssop; Categorylogic logic; File Size743KB，16 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74AVC16374DGG,512 Overview

IC D-type pos trg dual 48tssop

74AVC16374DGG,512 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconductor
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	TSSOP
package instruction	TSSOP,
Contacts	48
Manufacturer packaging code	SOT362-1
Reach Compliance Code	unknown
series	AVC
JESD-30 code	R-PDSO-G48
JESD-609 code	e4
length	12.5 mm
Logic integrated circuit type	BUS DRIVER
Humidity sensitivity level	1
Number of digits	8
Number of functions	2
Number of ports	2
Number of terminals	48
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	8.4 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	1.2 V
Nominal supply voltage (Vsup)	1.4 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	6.1 mm

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74AVC16374

16-bit edge triggered D-type flip-flop; 3.6 V tolerant; 3-state

Rev. 3 — 16 August 2013

Product data sheet

1. General description

The 74AVC16374 is a 16-bit edge triggered flip-flop featuring separate D-type inputs for

each flip-flop and 3-state outputs for bus-oriented applications. The 74AVC16374 consist

of 2 sections of 8 edge-triggered flip-flops. A clock input (CP) and an output enable (OE)

are provided per 8-bit section.

The 74AVC16374 is designed to have an extremely fast propagation delay and a

minimum amount of power consumption.

To ensure the high-impedance output state during power-up or power-down, nOE should

be tied to VCC through a pull-up resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line

drive during transient (see

Figure 5

and

Figure 6).

2. Features and benefits



Wide supply voltage range from 1.2 V to 3.6 V



Complies with JEDEC standards:



JESD8-7 (1.2 V to 1.95 V)



JESD8-5 (1.8 V to 2.7 V)



JESD8-1A (2.7 V to 3.6 V)



CMOS low power consumption



Input/output tolerant up to 3.6 V



Dynamic Controlled Output (DCO) circuit dynamically changes output impedance,

resulting in noise reduction without speed degradation



Low inductance multiple V

and GND pins to minimize noise and ground bounce



Supports Live Insertion

3. Ordering information

Table 1.

Ordering information

Package

Temperature range

74AVC16374DGG

40 C

to +85

C

Name

TSSOP48

Description

plastic thin shrink small outline package;

48 leads; body width 6.1 mm

Version

SOT362-1

Type number

74AVC16374DGG,512 Related Products

	74AVC16374DGG,512	74AVC16374DGG,518	74AVC16374DGG-T	935265484511	935265484512	935265484518
Description	IC D-type pos trg dual 48tssop	IC D-type pos trg dual 48tssop	IC AVC SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, PLASTIC, SOT-362, TSSOP-48, Bus Driver/Transceiver	AVC SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, PLASTIC, SOT-362, TSSOP-48	AVC SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, PLASTIC, SOT-362, TSSOP-48	AVC SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, PLASTIC, SOT-362, TSSOP-48
Maker	NXP	NXP	NXP	NXP	NXP	NXP
package instruction	TSSOP,	TSSOP,	TSSOP,	TSSOP,	TSSOP,	TSSOP,
Reach Compliance Code	unknown	unknown	unknown	unknow	unknow	unknow
series	AVC	AVC	AVC	AVC	AVC	AVC
JESD-30 code	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48
JESD-609 code	e4	e4	e4	e4	e4	e4
length	12.5 mm	12.5 mm	12.5 mm	12.5 mm	12.5 mm	12.5 mm
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
Number of digits	8	8	8	8	8	8
Number of functions	2	2	2	2	2	2
Number of ports	2	2	2	2	2	2
Number of terminals	48	48	48	48	48	48
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP	TSSOP	TSSOP	TSSOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	8.4 ns	8.4 ns	8.4 ns	8.4 ns	8.4 ns	8.4 ns
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V
Nominal supply voltage (Vsup)	1.4 V	1.4 V	1.4 V	1.4 V	1.4 V	1.4 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
width	6.1 mm	6.1 mm	6.1 mm	6.1 mm	6.1 mm	6.1 mm

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