The DRF1202 hybrid includes a high power gate driver and the power
MOSFET. The driver output can be configured as Inverting and Non-
Inverting. It was designed to provide the system designer increased
flexibility and lowered cost over a non-integrated solution.
D
IN
DRIVER
50A
MOSFET
S
FEATURES
• Switching Frequency: DC TO 15MHz
• Low Pulse Width Distortion
• Single Power Supply
• 1V CMOS Schmitt Trigger Input 1V
Hysteresis
• Inverting Non-Inverting Select
• RoHS Compliant
• Switching Speed 3-4ns
• B
Vds
= 500V
• I
ds
= 50A avg.
• R
ds(on)
≤ .25 Ohm
• P
D
= 1180W
TYPICAL APPLICATIONS
• Class C, D and E RF Generators
• Switch Mode Power Amplifiers
• Pulse Generators
• Ultrasound Transducer Drivers
• Acoustic Optical Modulators
Driver Absolute Maximum Ratings
Symbol
V
DD
IN, FN
I
O PK
T
JMAX
Parameter
Supply Voltage
Input Single Voltages
Output Current Peak
Operating and Storage Temperature
Ratings
15
-.7 to +5.5
8
175
Unit
V
A
°C
Driver Specifications
Symbol
V
DD
IN
IN
(R)
IN
(F)
I
DDQ
I
O
C
iss
R
IN
V
T(ON)
V
T(OFF)
T
DLY
t
r
t
f
T
D
Parameter
Supply Voltage
Input Voltage
Input Voltage Rising Edge
Input Voltage Falling Edge
Quiescent Current
Output Current
Input Capacitance
Input Parallel Resistance
Input, Low to High Out (See Truth Table)
Input, High to Low Out (See Truth Table)
Time Delay (throughput)
Rise Time
Fall Time
Prop. Delay
0.8
1.9
38
2.5
35
050-4973 Rev F 11-2013
Min
10
3
Typ
Max
15
5.5
Unit
V
ns
mA
A
MΩ
3
3
2
8
3
1
1.1
2.2
V
ns
ns
2.5
Microsemi Website - http://www.microsemi.com
Driver Output Characteristics
Symbol
C
out
R
out
L
out
F
MAX
F
MAX
Parameter
Output Capacitance
Output Resistance
Output Inductance
Operating Frequency CL = 3000nF + 50Ω
Operating Frequency RL = 50Ω
30
50
Min
Typ
2500
.8
3
Max
DRF1202
Unit
pF
Ω
nH
MHz
Driver Thermal Characteristics
Symbol
R
θ
JC
R
θ
JHS
T
JSTG
P
DJHS
P
DJC
Parameter
Thermal Resistance Junction to Case
Thermal Resistance Junction to Heat Sink
Storage Temperature
Maximum Power Dissipation @ T
SINK
= 25°C
Total Power Dissipation @ T
C
= 25°C
Parameter
Drain Source Voltage
Continuous Drain Current T
C
= 25°C @ I
D
= 25A
Drain-Source On State Resistance
Operating Temperature
Min
500
50
0.18
175
Min
Typ
1.5
2.5
-55 to 150
Max
Unit
°C/W
°C
W
60
100
MOSFET Absolute Maximum Ratings
Symbol
BV
DSS
I
D
R
DS(on)
T
jmax
Typ
Max
Unit
V
A
Ω
°C
MOSFET Dynamic Characteristics
Symbol
C
iss
C
oss
C
rss
Parameter
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Test Conditions
V
gs
= 0
V
DS
= 50V
f = 1 MHz
Min
Typ
2000
350
75
pF
Max
Unit
MOSFET Thermal Characteristics
Symbol
R
θ
JC
R
θ
JHS
T
JSTG
P
DHS
P
DC
Parameter
Thermal Resistance Junction to Case
Thermal Resistance Junction to Heat Sink
Storage Temperature
Maximum Power Dissipation @ T
SINK
= 25°C
Total Power Dissipation @ T
C
= 25°C
Min
Typ
Max
0.11
0.23
-55 to 150
Unit
°C/W
°C
W
650
1360
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
Figure 1, DRF1202 Simplified Circuit Diagram
050-4973 Rev F 11-2013
The Simplified DRF1202 Circuit Diagram is illustrated above. By including the driver high speed by-pass capacitor (C1), their contribution to
the internal parasitic loop inductance of the driver output is greatly reduced. This, coupled with the tight geometry of the hybrid, allows optimal
gate drive to the MOSFET. This low parasitic approach, coupled with the Schmitt trigger input (IN), Kelvin signal ground (SG) and the Anti-
Ring Function, provide improved stability and control in Kilowatt to Multi-Kilowatt, high Frequency applications. The IN pin is the input for the
control signal and is applied to a Schmitt Trigger. Both the FN and IN pins are referenced to Kelvin ground (SG.) The signal is then applied to
the intermediate drivers and level shifters; this section contains proprietary circuitry designed specifically for the ring abatement. The power
drivers provide high current to the gate of the MOSFETS.
DRF1202
Dynamic Characteristics
C
iss
CAPACITANCE
C
oss
C
rss
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 2, Typical Capacitance vs. Drain-to-Source Voltage
Truth Table
*Referenced to SG
FN (pin 3)*
HIGH
HIGH
LOW
LOW
IN (pin 4)*
HIGH
LOW
HIGH
LOW
MOSFET
ON
OFF
OFF
ON
The Function (FN, pin 3) is the invert or non-invert select Pin, it is Internally held high.
Figure 3, DRF1202 Test Circuit
050-4973 Rev F 11-2013
The Test Circuit illustrated above was used to evaluate the DRF1202 (available as an evaluation Board DRF12XX / EVALSW.) The input
control signal is applied to the DRF1202 via IN(4) and SG(5) pins using RG188. This provides excellent noise immunity and control of the
signal ground currents.
The +V
DD
inputs (2,6) are by-passed (C1,C2, C4-C9), this is in addition to the internal by-passing mentioned previously. The capacitors used
for this function must be capable of supporting the RMS currents and frequency of the gate load. R
L
set for I
DM
at V
DS
max this load is used to
evaluate the output performance of the DRF1202.
DRF1202
Pin Assignments
Pin 1
Pin 2
Pin 3
Pin 4
Pin 5
Pin 6
Pin 7
Pin 8
Pin 9
Pin 10
Ground
+Vdd
FN
IN
SG
+Vdd
Ground
Source
Drain
Source
All dimensions are ± .005
Figure 4, DRF1202 Mechanical Outline
050-4973 Rev F 11-2013
HAZARDOUS MATERIAL WARNING
The ceramic portion of the device between leads and mounting flange is beryllium oxide. Beryllium oxide dust is highly toxic when inhaled. Care must be taken during
handling and mounting to avoid damage to this area. These devices must never be thrown away with general industrial or domestic waste. BeO substrate weight:
1.973g. Percentage of total module weight which is BeO: 31%.
DRF1202
Disclaimer:
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DENTIAL information of Microsemi and cannot be copied, published, uploaded, posted, transmitted, distributed or disclosed or used without the
express duly signed written consent of Microsemi. If the recipient of this document has entered into a disclosure agreement with Microsemi, then
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than authorized personnel of Microsemi. No license under any patent, copyright, trade secret or other intellectual property right is granted to or
conferred upon you by disclosure or delivery of the information, either expressly, by implication, inducement, estoppels or otherwise. Any license
under such intellectual property rights must be approved by Microsemi in writing signed by an officer of Microsemi.
Microsemi reserves the right to change the configuration, functionality and performance of its products at anytime without any notice. This prod-
uct has been subject to limited testing and should not be used in conjunction with life-support or other mission-critical equipment or applications.
Microsemi assumes no liability whatsoever, and Microsemi disclaims any express or implied warranty, relating to sale and/or use of Microsemi
products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or
other intellectual property right. Any performance specifications believed to be reliable but are not verified and customer or user must conduct
and complete all performance and other testing of this product as well as any user or customers final application. User or customer shall not rely
on any data and performance specifications or parameters provided by Microsemi. It is the customer’s and user’s responsibility to independently
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