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5962-9459902MXC

Description
8K X 8 NON-VOLATILE SRAM, 35 ns, CQCC28
Categorystorage   
File Size69KB,10 Pages
ManufacturerETC
Download Datasheet Parametric View All

5962-9459902MXC Overview

8K X 8 NON-VOLATILE SRAM, 35 ns, CQCC28

5962-9459902MXC Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals28
Maximum operating temperature125 Cel
Minimum operating temperature-55 Cel
Maximum supply/operating voltage5.5 V
Minimum supply/operating voltage4.5 V
Rated supply voltage5 V
maximum access time35 ns
Processing package description0.350 INCH, CERAMIC, LCC-28
stateTRANSFERRED
CraftsmanshipCMOS
packaging shapeRECTANGULAR
Package SizeCHIP CARRIER
surface mountYes
Terminal formNO LEAD
Terminal spacing1.27 mm
terminal coatingTIN LEAD
Terminal locationQUAD
Packaging MaterialsCERAMIC, METAL-SEALED COFIRED
Temperature levelMILITARY
memory width8
organize8K X 8
storage density65536 deg
operating modeASYNCHRONOUS
Number of digits8192 words
Number of digits8K
Memory IC typeNON-VOLATILE SRAM
serial parallelPARALLEL
STK12C68-M
STK12C68-M
CMOS nvSRAM
8K x 8
AutoStore™
Nonvolatile Static RAM
MIL-STD-883 / SMD # 5962-94599
FEATURES
• 40, 45 and 55ns Access Times
• 15 mA I
CC
at 200ns Access Speed
• Automatic
STORE
to
EEPROM
on Power Down
• Hardware or Software initiated
STORE
to
EEPROM
DESCRIPTION
The Simtek STK12C68-M is a fast static RAM (40, 45
and 55ns), with a nonvolatile EEPROM element incor-
porated in each static memory cell. The SRAM can be
read and written an unlimited number of times, while
independent nonvolatile data resides in EEPROM.
Data transfers from the SRAM to the EEPROM (the
STORE
operation) take place automatically upon power
down using charge stored in an external 100
µF
capacitor. Transfers from the EEPROM to the SRAM
(the
RECALL
operation) take place automatically on
power up. Software sequences may also be used to
initiate both
STORE
and
RECALL
operations. A
STORE
can also be initiated via a single pin.
The STK12C68-M is available in the following pack-
ages: a 28-pin 300 mil ceramic DIP and 28-pad LCC.
• Automatic
STORE
Timing
• 100,000
STORE
cycles to
EEPROM
• 10 year data retention in
EEPROM
• Automatic
RECALL
on Power Up
• Software initiated
RECALL
from
EEPROM
• Unlimited
RECALL
cycles from
EEPROM
• Single 5V
±
10% Operation
• Available in multiple standard packages
LOGIC BLOCK DIAGRAM
EEPROM ARRAY
256 x 256
A
3
A
4
ROW DECODER
PIN CONFIGURATIONS
V
CAP
V
CCX
V
CAP
A
12
A
7
HSB
A
8
A
9
A
11
G
A
10
E
DQ
7
DQ
6
W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CCX
W
HSB
A
8
A
9
A
11
G
A
10
E
DQ
7
DQ
6
DQ
5
DQ
4
DQ
3
A
7
A
12
3
2
STORE
STATIC RAM
ARRAY
256 x 256
A
0
A
12
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
0
DQ
1
4
5
6
7
8
9
10
11
12
1
28 27
26
25
24
23
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
0
DQ
1
DQ
2
V
SS
A
5
A
6
A
7
A
8
A
9
A
12
DQ
0
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
RECALL
TOP VIEW
22
21
20
19
18
STORE/
RECALL
CONTROL
HSB
13 14 15 16 17
DQ
2
DQ
3
DQ
4
DQ
5
Vss
28 - LCC
COLUMN I/O
INPUT BUFFERS
28 - 300 C-DIP
PIN NAMES
A
0
- A
12
W
DQ
0
- DQ
7
E
G
COLUMN DECODER
Address Inputs
Write Enable
Data In/Out
Chip Enable
Output Enable
Power (+5V)
Ground
Capacitor
Hardware Store/Busy
A
0
A
1
A
2
A
10
A
11
G
V
CCX
V
SS
E
W
V
CAP
HSB
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