EEWORLDEEWORLDEEWORLD

Part Number

Search

AXLA4R7T16CF316X37

Description
Aluminum Electrolytic Capacitor, Polarized, Aluminum, 16V, 50% +Tol, 10% -Tol, 4.7uF
CategoryPassive components    capacitor   
File Size152KB,1 Pages
ManufacturerIBS Electronics Inc
Download Datasheet Parametric View All

AXLA4R7T16CF316X37 Overview

Aluminum Electrolytic Capacitor, Polarized, Aluminum, 16V, 50% +Tol, 10% -Tol, 4.7uF

AXLA4R7T16CF316X37 Parametric

Parameter NameAttribute value
Objectid1208593052
package instruction,
Reach Compliance Codeunknown
ECCN codeEAR99
capacitance4.7 µF
Capacitor typeALUMINUM ELECTROLYTIC CAPACITOR
Custom functionsLead Length (Consult Factory)
diameter16 mm
dielectric materialsALUMINUM
length37 mm
Manufacturer's serial numberAXLA
negative tolerance10%
Number of terminals2
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package formAxial
polarityPOLARIZED
positive tolerance50%
Rated (DC) voltage (URdc)16 V
seriesAXLA
Terminal pitch7.5 mm
Semiconductor diode parameter symbols and meanings
[E][E][E]CT---Barrier capacitanceCj ---Junction (inter-electrode) capacitance, which indicates the total capacitance of the germanium detector diode under the specified bias voltage applied to both en...
fighting Analog electronics
Which RTOS operating system are you using? Tell me about their advantages and disadvantages?
[b][size=3]Which embedded operating system do you use in your work and study? [/size][/b][b][size=3] [/size][/b] [b][size=3]Why did you choose it? [/size][/b] [b][size=3] [/size][/b] [b][size=3]Can yo...
eric_wang Embedded System
Remote FPGA version update and reboot
[align=center][b][font=宋体][size=22.0pt]Remote[/size][/font][/b][b][size=22.0pt]FPGA[/size][/b][b][font=宋体][size=22.0pt]Version Update and Restart[/size][/font][/b][/align][align=left]Today, most commu...
zx_lx FPGA/CPLD
Has anyone designed with SV?
It goes without saying that SV can be used for verification, but it is said that SV can also be used for design in the future, and this is the trend. Are there people who use SV for design now? If so,...
eeleader FPGA/CPLD
About simulating single chip microcomputer in Multisim
When writing a Keil program, a simulation error occurs. The following is the program. Is the problem with the program or the circuit? #include sbit d1=P0^0; void main() { EA=1;//Open general interrupt...
Rodecin 51mcu
Design of Fully Digital Quadrature Phase Shift Keying Demodulator
Abstract: As the core component of the digital satellite video broadcasting (DVB-S) receiving chip, a design of a fully digital quadrature phase shift keying (QPSK) receiving demodulator is given. The...
JasonYoo Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1260  311  2654  46  940  26  7  54  1  19 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号