21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV02/PI90LVT02
SOTiny
TM
LVDS High-Speed
Differential Line Receiver
Features
• Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995 Standard
• Signaling rates up to 400 Mbps
• Interfaces to LVDS, LVPECL
• Bus-Terminal ESD exceeds 10kV
• Differential Input Voltage Threshold less than 100mV
• Typical Propagation Delay Times of 2.6ns
• Typical Power Dissipation of 40mW @200 MHz
• Low Voltage TTL (LVTTL) Level is 5V Tolerant
• Open-Circuit Fail Safe
• Output are High Impedance with V
CC
<1.5V
• Integrated 110-ohm Line Termination Resistor (PI90LVT02)
• Operates from a 3.3V supply
• Input common-mode voltage range 0V–3.2V
• Industrial Temperature Operating Range: –40°C to 85°C
• Packaging (Pb-free & Green available):
- 5-pin space-saving SOT-23 (T)
Description
The PI90LV02 and PI90LVT02 are single differential line receivers
that use low-voltage differential signaling (LVDS) to support data
rates up to 400 Mbps. These products are designed for applications
requiring high-speed, low-power consumption, low-noise genera-
tion, and a small package.
A differential input signal (350mV) is translated by the device to a
3.3V CMOS output level. The PI90LVT02 integrates the terminating
resistor while the PI90LV02 requires an external resistor.
Applications
Applications include point-to-point and multi-drop baseband data
transmissions over impedance media of approximately 100-ohms.
The transmission media can be printed circuit board traces,
backplanes, or cables.
The PI90LV02 and PI90LVT02 and companion line drivers (PI90LV01
and PI90LVB01) provide new alternatives to RS-232, PECL, and ECL
devices for high-speed, point-to-point interface applications.
Logic Diagram
PI90LV02
A
B
3
5
4
ROUT
Pinout
VCC
GND
1
2
3
5
ROUT
PI90LVT02
A
B
3
4
110-ohm
5
ROUT
A
4
B
Function Table
Inputs
V
ID
=V
A
–V
B
V
ID
>50mV
–50mV < V
ID
< 50mV
V
ID
≤
–50mV
O pen
H = high level
L = low level
? = indeterminate
1
PS8659B
09/28/04
Outputs
R
OUT
H
?
L
H
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV02/PI90LVT02
SOTiny LVDS High-Speed Differential Line Receiver
TM
Absolute Maximum Ratings Over Operating Free-Air Temperature
(unless otherwise noted)
†
Supply Voltage Range, V
CC(1) ..................................................................................
–0.5V to 4V
Voltage Range (A, B , or R
OUT
) ...................................................... –0.5 to V
CC
+0.5V
ESD rating (HBM, 1.5K-ohms, 100pF) ............................................................
≥
10KV
Continuous total power dissipation ................................. See dissipation rating table
Storage Temperature Range ................................................................ –65°C to 150°C
Lead Temperature 1.6 mm (1/16 inch) from case for 10 seconds ......................... 250°C
†
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the
device. These are stress ratings only, and functional operation of the device at these or any other conditions
beyond those indicated under "Recommended Operating Conditions" is not implied. Exposure to Absolute-
Maximum-Rated conditions for extended periods may affect device reliability.
Notes:
1. All voltage values, except differential I/O bus voltages, are with respect to ground terminal.
Dissipation Rating Table
Package
5- Pin SOT- 23 (T)
T
A
£ 25°C Powe r Rating
385mW
De rating Factor Above T
A
= 25°C
**
3.1mW/°C
T
A
= 85°C Powe r Rating
200mW
**This is the inverse of the junction-to-ambient thermal resistance when board-mounted (low-K) and with no air flow.
Recommended Operating Conditions
M in.
Supply Voltage, V
C C
Magnitude of differential input voltage, |V
ID
|
3.0
0.1
0
Nom.
3.3
M ax.
3.6
0.6
| V
ID
|
2.0 – –––
2
V
C C
–0.8
Operating free- air temperature, T
A
–40
85
°C
V
Units
Common- Mode Input Voltage, V
IC
(See Figure 6)
2
PS8659B
09/28/04
VIC – Common-Mode Input Voltage – V
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
COMMON-MODE INPUT VOLTAGE
vs.
DIFFERENTIAL INPUT VOLTAGE
3
2.5
VCC = 3.6V
2
VCC = 3.6V
1.5
VCC = 3.6V
1
0.5
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
I VID I – Differential Input Voltage – V
0.8
PI90LV02/PI90LVT02
SOTiny LVDS High-Speed Differential Line Receiver
TM
Figure 1. V
IC
vs. V
ID
and V
CC
Electrical Characteristics, V
CC
= 3V to 3.6V
(Over Recommended Operating Conditions, unless otherwise noted).
Symbol
V
ITH+
V
ITH–
V
OH
V
OL
I
CC
Parame te r
Positive- going differential input voltage threshold
Negative- going differential input voltage threshold
High- level output voltage
Low- level output voltage
Supply current
LV02
I
I
Input current (A or B inputs)
LVT02
LV02
LVT02
LV02
LVT02
LV02
LVT02
Te s t Conditions
See Figure 2, & Table 1
I
OH
= –8mA
I
OL
= 8mA
No load, Steady state
V
I
= 0V
V
I
= 0V, Other input open
V
I
= 2.4V or V
CC
–0.8
V
I
= 2.4V, Other input open
V
IA
= 0V, V
IB
= 0.1V
V
IA
= 2.4V, V
IB
= 2.3V
V
IA
= 2.4V, V
IB
= 2.3V
V
CC
= 0V, V
I
= 2.4V
V
CC
= 0V, V
I
= 2.4V,
Other input open
1.5
1.8
–1.2
–2.4
±2
2.2
20
40
µA
mA
M in.
Typ.
(1)
M ax.
10 0
–100
2.4
3
0.25
4
0.4
7
± 20
± 40
µA
mA
Units
mV
V
I
ID
High- level input current
(I
IA
– I
IB
)
I
I(OFF)
Power- off input current
(A or B inputs)
3
PS8659B
09/28/04
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV02/PI90LVT02
SOTiny LVDS High-Speed Differential Line Receiver
TM
Receiver Switching Characteristics, V
CC
= 3V to 3.6V
(Over Recommended Operating Conditions, unless noted).
Symbol
t
PLH
t
PHL
t
r
t
f
t
sk(p)
t
PZH
t
PZL
t
PHZ
t
PLZ
Parame te r
Propagation delay time, low- to- high level output
Propagation delay time, high- to- low level output
Output signal rise time
Output signal fall time
Pulse skew (
t
PHL
- t
PLH
)
(2)
Propagation delay time, high- level- to- high- impedance
output
Propagation delay time, low- level- to- low- impedance output
Propagation delay time, high- impedance- to- high- level output
Propagation delay time, low- impedance- to- high- level output
Te s t Conditions
C
L
= 10pF,
See Figure 3
M in.
1.3
1.3
Typ.
(1)
2.1
2.0
0.7
0.7
0.1
1.5
M ax.
3.2
3.2
1.4
1.4
0.5
3.1
6.0
3.5
7.6
Units
ns
See Figure 4
4.0
2.5
6.0
Notes:
1. All typical values are at 25°C and with a 3.3V supply
2. t
sk(p)
is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.
Parameter Measurement Information
A
V
IA
+ V
IB
2
V
IC
V
IB
V
ID
V
IA
B
R
OUT
V
O
Figure 2. Receiver Voltage Definitions
4
PS8659B
09/28/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV02/PI90LVT02
SOTiny LVDS High-Speed Differential Line Receiver
TM
Table 1. Receiver Minimum and Maximum Input Threshold Test Voltages
Applie d Voltage s (V)
V
IA
1.25
1. 15
2.4
2.3
0.05
0
1. 5
0.9
2.4
1. 8
0.6
0
V
IB
1.20
1.20
2.35
2.35
0
0.05
0.9
1.5
1.8
2.4
0
0.6
Re s ulting Diffe re ntial
Input Voltage (mV)
V
ID
50
–5 0
50
–50
50
–50
600
–600
600
–600
600
–6 0 0
Re s ulting Common-M ode
Input Voltage (V)
V
IC
1.2
1.2
2.35
2.35
0.05
0.05
1.2
1.2
2.1
2.1
0.3
0.3
5
PS8659B
09/28/04
NXP MCU
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EEWORLD
