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5962R9662401TXC

Description
4000/14000/40000 SERIES, 4-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDFP16, CERAMIC, DFP-16
Categorylogic    logic   
File Size74KB,3 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric Compare View All

5962R9662401TXC Overview

4000/14000/40000 SERIES, 4-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDFP16, CERAMIC, DFP-16

5962R9662401TXC Parametric

Parameter NameAttribute value
Parts packaging codeDFP
package instructionDFP, FL16,.3
Contacts16
Reach Compliance Codeunknown
Counting directionRIGHT
series4000/14000/40000
JESD-30 codeR-CDFP-F16
JESD-609 codee4
Logic integrated circuit typeSERIAL IN PARALLEL OUT
Maximum Frequency@Nom-Sup2220000 Hz
Number of digits4
Number of functions2
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityTRUE
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Encapsulate equivalent codeFL16,.3
Package shapeRECTANGULAR
Package formFLATPACK
power supply5/15 V
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class T
Maximum seat height2.92 mm
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
total dose100k Rad(Si) V
Trigger typePOSITIVE EDGE
width6.73 mm
Base Number Matches1
CD4015BT
Data Sheet
July 1999
File Number
4621.1
CMOS Dual 4-Stage Static Shift Register
With Serial Input/Parallel Output
Intersil’s Satellite Applications
(SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
CD4015BT consists of two identical, independent, 4-stage
serial-input/parallel output registers. Each register has
independent CLOCK and RESET inputs as well as a single
serial DATA input. “Q” outputs are available from each of the
four stages on both registers. All register stages are D type,
master-slave flip-flops. The logic level present at the DATA
input is transferred into the first register stage and shifted
over one stage at each positive-going clock transition.
Resetting of all stages is accomplished by a high level on the
reset line. Register expansion to 8 stages using one
CD4015BT, or to more than 8 stages using additional
CD4015BT’s is possible.
Flow
TM
Features
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
- Gamma Dose (γ) 1 x 10
5
RAD(Si)
- SEP Effective LET > 75 MEV/gm/cm
2
• Medium Speed Operation 12MHz (typ.) Clock Rate at V
DD
- V
SS
= 10V
• Fully Static Operation
• 8 Master-Slave Flip-Flops Plus Input and Output Buffering
• 100% Tested For Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Standardized Symmetrical Output Characteristics
Pinouts
CD4015BT (SBDIP), CDIP2-T16
TOP VIEW
CLOCK B 1
Q4B 2
Q3A 3
Q2A 4
Q1A 5
RESET A 6
DATA A 7
V
SS
8
16 V
DD
15 DATA B
14 RESET B
13 Q1B
12 Q2B
11 Q3B
10 Q4A
9 CLOCK A
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the CD4015BT are
contained in SMD 5962-96624.
A “hot-link” is provided from
our website for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
CLOCK B
CD4015BT (FLATPACK), CDFP4-F16
TOP VIEW
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
DATA B
RESET B
Q1B
Q2B
Q3B
Q4A
CLOCK A
Ordering Information
ORDERING
NUMBER
5962R9662401TEC
5962R9662401TXC
PART
NUMBER
CD4015BDTR
CD4015BKTR
TEMP.
RANGE
(
o
C)
-55 to 125
-55 to 125
Q4B
Q3A
Q2A
Q1A
RESET A
DATA A
V
SS
NOTE:
Minimum order quantity for -T is 150 units through
distribution, or 450 units direct.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207
|
Copyright
©
Intersil Corporation 1999
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.

5962R9662401TXC Related Products

5962R9662401TXC 5962R9662401TEC
Description 4000/14000/40000 SERIES, 4-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDFP16, CERAMIC, DFP-16 4000/14000/40000 SERIES, 4-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP16, SIDE BRAZED, CERAMIC, DIP-16
Parts packaging code DFP DIP
package instruction DFP, FL16,.3 DIP, DIP16,.3
Contacts 16 16
Reach Compliance Code unknown unknown
Counting direction RIGHT RIGHT
series 4000/14000/40000 4000/14000/40000
JESD-30 code R-CDFP-F16 R-CDIP-T16
JESD-609 code e4 e4
Logic integrated circuit type SERIAL IN PARALLEL OUT SERIAL IN PARALLEL OUT
Maximum Frequency@Nom-Sup 2220000 Hz 2220000 Hz
Number of digits 4 4
Number of functions 2 2
Number of terminals 16 16
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C
Output polarity TRUE TRUE
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code DFP DIP
Encapsulate equivalent code FL16,.3 DIP16,.3
Package shape RECTANGULAR RECTANGULAR
Package form FLATPACK IN-LINE
power supply 5/15 V 5/15 V
Certification status Not Qualified Not Qualified
Filter level MIL-PRF-38535 Class T MIL-PRF-38535 Class T
Maximum seat height 2.92 mm 5.08 mm
Nominal supply voltage (Vsup) 5 V 5 V
surface mount YES NO
technology CMOS CMOS
Temperature level MILITARY MILITARY
Terminal surface GOLD GOLD
Terminal form FLAT THROUGH-HOLE
Terminal pitch 1.27 mm 2.54 mm
Terminal location DUAL DUAL
total dose 100k Rad(Si) V 100k Rad(Si) V
Trigger type POSITIVE EDGE POSITIVE EDGE
width 6.73 mm 7.62 mm
Base Number Matches 1 1

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